Level converting circuit

Electronic digital logic circuitry – Interface – Logic level shifting

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Details

326 34, 326 83, H03K 190175

Patent

active

056358598

ABSTRACT:
The present invention provides a level converting circuit comprising: a differential output transistor circuit for amplifying a difference between two mutually complementary input logic signals; a first output transistor circuit for outputting an inverted output logic signal based on a signal output by the differential output transistor circuit; and a second output transistor circuit for outputting an uninverted output logic signal based on a signal output by the differential output transistor circuit, wherein the first output transistor circuit further comprises first and second field-effect transistors and the second output transistor circuit further comprises third and fourth field-effect transistors. The differential output transistor circuit comprises a combination of first, second, third, fourth and fifth bais components which are each resistive element or a field-effect transistors. Assume that the uninverted logic output signal is lowered to an `L` level at a potential lower than that of the second differential output point. In this state, the fourth field-effect transistor of the second output transistor circuit performs a reversed operation, causing a drain current to flow to the output unit. Accordingly, the potential of the second differential output point is pulled down, displaying a feedback function that lowers back the gate potential of the third field-effect transistor of the second output transistor circuit and abruptly pulling up its `L` to `H` level.

REFERENCES:
patent: 4797583 (1989-01-01), Ueno et al.
patent: 4841175 (1989-06-01), De Man
patent: 5068551 (1991-11-01), Bosnyak
patent: 5148061 (1992-09-01), Hsueh et al.
patent: 5241225 (1993-08-01), Okajima et al.

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