Level conversion circuits for converting a digital input signal

Details Level conversion circuits for converting a digital input signal Level conversion circuits for converting a digital input signal

1994-06-10

1995-12-26

Westin, Edward P.

Electronic digital logic circuitry

Interface

Supply voltage level shifting

326 81, 326121, H03K 190175

Patent

active

054791162

ABSTRACT:
A level converts circuit converting a digital input signal varying between a first (VSS) and a second (VDD1) voltage level to a digital output signal varying between the first (VSS) and a third voltage. (VDD2) the local conversion circuit includes between first (VDD2) and second (VSS) poles of a DC supply source a series connection of a load impedance (P2/P3/N3) and the main paths of a first transistor (N2) and of a second transistor (N1), to a control electrode of which the input signal is applied. The first and second transistor are of a same first conductivity type. A third transistor (P1) of a second conductivity type is connected in parallel with the second transistor (N1). A control electrode of the third (P1) and first (N2) transistors are biased by a constant DC bias voltage (VBIAS1A/VBIAS1B), and a junction point of the load impedance (P2/P3/N3) and the series connection being an output terminal (OUT) of the level conversion circuit.

REFERENCES:
patent: 4631426 (1986-12-01), Nelson
patent: 4697101 (1987-09-01), Iwahashi
patent: 4958091 (1990-09-01), Roberts
patent: 4963766 (1990-10-01), Lundberg
patent: 5172016 (1992-12-01), Dobberduhl
patent: 5321324 (1994-06-01), Hardee et al.
"Analog MOS Integrated Circuits for Signal Processing", by R. Gregorian E.A., J. Wiley & Sons, 1986, pp. 200-203.
IBM Technical Disclosure Bulletin, "5-Volts Signal Shifter in a 3-Volts CMOS Circuit", vol. 32, No. 7, Dec. 1989, New York US, pp. 454-455.

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