Electronic digital logic circuitry – Interface – Logic level shifting
Patent
1994-04-22
1995-11-07
Westin, Edward P.
Electronic digital logic circuitry
Interface
Logic level shifting
326110, 326 80, H03L 190175
Patent
active
054650577
ABSTRACT:
A level conversion circuit for converting a first signal having a first amplitude into a second signal having a second amplitude that is larger than the first amplitude, includes a bipolar transistor supplied at a base thereof with the first signal, a first MOS transistor of a first channel type having a gate supplied with a bias voltage and a source-drain path connected between the emitter of the bipolar transistor and an output node from which the second signal is derived, and a second MOS transistor of a second channel type having a gate supplied with an inverted signal of the first signal and a source-drain path connected between the output node and a reference potential line. A PN junction diode is preferably inserted between the third transistor and the reference potential line.
REFERENCES:
patent: 4992681 (1991-02-01), Urakawa
patent: 5068551 (1991-09-01), Bosnyak
patent: 5075579 (1991-12-01), Veno
patent: 5103121 (1992-04-01), Wendell
patent: 5287019 (1994-02-01), Nonaka
European Search Report.
S. Embabi et al,; "Analysis and Optimization of BiCMOS Digital Circuit Structures"; IEEE Journal of Solid-State Circuits; vol. 26, No. 4, Apr. 1991; pp. 676-679.
NEC Corporation
Sanders Andrew
Westin Edward P.
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