Electronic digital logic circuitry – Interface – Supply voltage level shifting
Reexamination Certificate
2009-12-09
2011-11-29
Ismail, Shawki S (Department: 2819)
Electronic digital logic circuitry
Interface
Supply voltage level shifting
C326S063000, C326S068000, C326S083000, C327S333000
Reexamination Certificate
active
08067961
ABSTRACT:
In a level conversion circuit, two P channel MOS transistors form a current mirror circuit. When an input signal rises from the “L” level to the “H” level, an N channel MOS transistor connected to a drain of one P channel MOS transistor is brought out of conduction to prevent a leak current from flowing through two P channel MOS transistors, which decreases a power consumption. In addition, when the input signal rises from the “L” level to the “H” level, a P channel MOS transistor connected to a drain of the other P channel MOS transistor is brought into conduction to fix a potential of a node of the drain of the other P channel MOS transistor to the “H” level, which prevents the potential of the node from becoming unstable.
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Buchanan & Ingersoll & Rooney PC
Ismail Shawki S
Renesas Electronics Corporation
Tabler Matthew C.
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