Level conversion circuit

Electronic digital logic circuitry – Interface – Logic level shifting

Reexamination Certificate

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Details

C326S062000, C326S063000, C326S080000, C326S081000, C326S082000, C326S083000, C326S086000, C326S087000, C326S112000, C326S115000, C326S126000, C326S127000, C327S108000, C327S109000

Reexamination Certificate

active

11166255

ABSTRACT:
An input circuit (a first transistor pair) that receives complementary input signals is connected to a latch circuit (a second transistor pair) that converts the amplitude of an input signal into second amplitude higher than first amplitude. A current mirror circuit (a third transistor pair) is disposed between the latch circuit and a high-level power supply line. The current mirror circuit makes a source voltage of the second transistors being turned on lower than the source voltage of the second transistors being turned off. The second transistors being turned on are likely to be turned off although the on-current of corresponding first transistors is low. To the contrary, the second transistors being turned off are likely to be turned on. Accordingly, even when a voltage of a high logic level of an input signal is low, the level conversion circuit can surely operate without malfunction.

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patent: 11-195975 (1999-07-01), None
patent: 2003-338178 (2003-11-01), None

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