Electronic digital logic circuitry – Interface – Logic level shifting
Reexamination Certificate
2006-07-18
2006-07-18
Tran, Anh Q. (Department: 2819)
Electronic digital logic circuitry
Interface
Logic level shifting
C326S080000, C326S081000
Reexamination Certificate
active
07078934
ABSTRACT:
The source of a p-channel MOSFET of a level conversion unit is connected to a supply terminal which receives supply voltage VDD. The drain is connected to an output node NO and the gate is connected to an input node I2. The source of a n-channel MOSFET is connected to an input node I2, the drain is connected to the output node NO and the gate is connected to the supply terminal which receives the supply voltage VDD. Input signals CLK1and CLK2change complementarily and difference of voltage between the high level and low level of the signals is smaller than difference between the supply voltage VDD and the ground voltage.
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Office Action for Corresponding Korean Patent Application 10-2004-7000337 dated Aug. 31, 2005.
Matsumoto Shoichiro
Noguchi Yukihiro
McDermott Will & Emery LLP
Sanyo Electric Co,. Ltd.
Tran Anh Q.
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