LED array

Active solid-state devices (e.g. – transistors – solid-state diode – Incoherent light emitter structure – Plural light emitting devices

Reexamination Certificate

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Details

C257S089000, C257S090000, C257S091000, C257S092000, C257S099000, C257S100000, C257S640000, C257S651000, C257S639000

Reexamination Certificate

active

06211537

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to LED arrays for use in an exposure light source (printer head) for an electrophotographic printer, and more particularly to highly integrated LED arrays with a density or resolution higher than 1200 DPI (Dot Per Inch).
2. Description of Related Art
Japanese Utility Model Preliminary Publication (KOKAI) No. 62-60053 discloses one such conventional LED array as a light source for use in an electrophotographic printer.
FIGS. 6A-6B
illustrate the construction of the conventional LED array
4
,
FIG. 6A
being a top view of the LED array
4
and
FIG. 6B
being a cross-sectional view taken along lines
6
B—
6
B of FIG.
6
A.
As shown in
FIGS. 6A-6B
, the LED array
4
includes a plurality of LEDs
40
aligned in a row on an n-type semiconductor substrate
41
. Each of the LEDs
40
includes a first interlayer dielectric
42
a
, first window
46
formed in the first interlayer dielectric
42
a
, second interlayer dielectric
42
b
, second window
48
formed in the second interlayer dielectric
42
b
, p-type diffusion region
43
, p-electrode
44
, and n-electrode
45
.
The second window
48
is in alignment with the first window
46
and is of the same size as or slightly larger than the first window
46
. In other words, the first window
46
is within the second window
48
. The p-type diffusion region
43
is formed in the n-type semiconductor substrate immediately below the first window
46
. The p-electrode
44
extends into the first window
46
and contacts the p-type diffusion region
43
. The n-electrode
45
is common to all of the LEDs
40
and is formed on the reverse side of the n-type semiconductor substrate
41
.
The p-type diffusion region
43
and n-type semiconductor substrate
41
constitute a pn junction
51
which emits light when energized. The p-electrode
44
is formed to cover the p-type diffusion region
43
both at a part
47
a
of the diffusion region surface
47
and at a part
46
a
of the first window
46
. When a current flows between the p-electrode
44
and the n-electrode
45
, the pn junction
51
emits light which emanates from a light-emitting area
47
b
not covered with the p-electrode
44
.
Using the first interlayer dielectric
42
a
as a selective diffusion mask, zinc which is a p-type impurity is diffused from the first window
46
into the n-type semiconductor substrate
41
, forming the diffusion region
43
. The second interlayer dielectric
42
b
is formed in order to ensure the insulation between the p-electrode
44
and the n-type semiconductor substrate
41
even when pin holes are developed in the first interlayer dielectric
42
a
. Forming the second interlayer dielectric
42
b
on the first interlayer dielectric
42
a
improves the yield of the LED array
4
.
With the aforementioned conventional LED array
4
, if the LED array
4
is to have a ultra-high density higher than 1200 DPI, then the first windows
46
must be very small and arranged at very small intervals accordingly. Correspondingly, the second windows
48
must also be very small. Therefore, the mask must be registered with high accuracy during the photolithography process for forming the second windows
48
regardless of whether the second windows
48
are of the same size as or larger than the first windows
460
. If the first windows
46
are partly outside of the second windows
48
due to poor alignment accuracy, the p-electrode
44
may have a smaller area in contact with the p-type diffusion region
43
, that is, the area of the part
46
a
decreases. A decrease in the area of the part
46
a
increases contact resistance, resulting in poor characteristics and therefore lower yield of the LED arrays.
SUMMARY OF THE INVENTION
The present invention is to solve the aforementioned problems of the conventional LED arrays.
An object of the present invention is to provide highly integrated LED arrays with good yield of the LED arrays.
Another object of the present invention is to provide LED arrays with high radiation efficiency of light.
A first interlayer dielectric is formed on a semiconductor substrate of a first conductivity type. The first interlayer dielectric has a plurality of first windows formed therein and aligned in a row. A second interlayer dielectric is formed on the first interlayer dielectric. A diffusion region of a second conductivity type is formed in the semiconductor substrate through each of the first windows. An electrode is formed and has an area in contact with the diffusion region. The second interlayer dielectric is formed such that the second interlayer dielectric does not overlap an area of the electrode in contact with the diffusion region and does not extend to a first perimeter of the area.
The second interlayer has a second window with a second perimeter and the first windows are within the second window and do not extend to the second perimeter.
The second interlayer may be formed to cover each of the first windows except for an area of the electrode in contact with the diffusion region. The second interlayer dielectric is formed of a material transparent to light and has a refractive index larger than 1.9 so that light emanates through the second interlayer dielectric efficiently.
Further scope of applicability of the present invention will become apparent from the detailed description given hereinafter. However, it should be understood that the detailed description and specific examples, while indicating preferred embodiments of the invention, are given by way of illustration only, since various changes and modifications within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description.


REFERENCES:
patent: 4145707 (1979-03-01), Sadamasa et al.
patent: 5523590 (1996-06-01), Ogihara et al.
patent: 0 723 285 (1996-07-01), None
patent: 0 776 047 (1997-05-01), None
patent: 62-60053 (1987-04-01), None
patent: 5-95134 (1993-04-01), None
patent: 07122781 (1995-05-01), None
patent: 7-122781 (1995-05-01), None
patent: 08330634 (1996-12-01), None
Ogihara, Mitsuhiko et al., “1200 DPI Light Emitting Diode Array for Optical Printer Print Heads,” Extended Abstracts of the 1996 International Converence on Solid State Devices and Materials, 1996 pp. 604-606.*
“1200 DPI Light Emitting Diode Array for Optical Printer Print Heads” Ogihara et al. Extended Abstracts of the 1996 International Conference on Solid State Devices and Materials, pp. 604-606, 1996.

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