Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2001-02-20
2002-07-09
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S295000, C438S459000, C438S524000, C438S977000
Reexamination Certificate
active
06417030
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field of the Invention
The invention relates generally to silicon-on-insulator (SOI) devices and methods for forming the same. The invention relates particularly to SOI devices and methods for forming which avoid or reduce floating body effects.
2. Background of the Prior Art
Silicon on insulator (SOI) materials offer potential advantages over bulk materials for the fabrication of high performance integrated circuits. Dielectric isolation and reduction of parasitic capacitance improve circuit performance, and eliminate latch-up in CMOS circuits. Compared to bulk circuits, SOI is more resistant to radiation. For example, silicon-on-sapphire (SOS) technology has been successfully used for years to fabricate radiation-hardened CMOS circuits for military applications. Circuit layout in SOI can be greatly simplified and packing density greatly increased if the devices are made without body contacts (i.e., if the body regions of these devices are “floating”). However, partially-depleted metal oxide semiconductor field effect transistors (MOSFETs) on SOI materials typically exhibit parasitic effects due to the presence of the floating body (“floating body effects”). The partially-depleted devices are such that the maximum depletion width in the body is smaller than the thickness of the semiconductor Si layer, and a quasi-neutral region results which has a floating potential. These floating body effects may result in undesirable performance in SOI devices.
It will be appreciated from the foregoing that a need exists for SOI MOSFETs having reduced floating body effects.
SUMMARY OF THE INVENTION
A silicon on insulator (SOI) device includes an electrically-conducting interface region along a portion of the interface between the insulator and a semiconductor layer atop the insulator. The electrically-conducting interface region provides a “leaky” electrical coupling between the body and source regions of a transistor device such as a MOSFET, thereby reducing floating body effects of the transistor device. A method of forming such a semiconductor device includes forming the electrically-conducting interface region by damaging or implanting materials in the insulator and/or the semiconductor in the vicinity of the interface therebetween. The method may include producing a stepped interface region, such as by etching, in order to aid properly locating the transistor device relative to the electrically-conducting interface region.
According to an aspect of the invention a semiconductor device includes a transistor device having a source region and a body region, the transistor device being mounted on an insulating layer, and an electrically-conducting interface region along the interface between the transistor device and the insulating layer, the electrically-conducting interface region providing an electrical connection between the body region and the source region.
According to another aspect of the invention, a method of producing a semiconductor device includes damaging all or a portion of a surface of a semiconductor wafer, and depositing an insulator on the surface.
According to yet another aspect of the invention, a method of producing a semiconductor device includes implanting a material on all or a portion of the surface of a semiconductor wafer, and depositing an insulator on the implanted surface.
According to still another aspect of the invention, a method of producing a semiconductor device includes etching a stepped region on a surface of a semiconductor wafer, forming an electrically conducting material in the region of the stepped portion, and using the stepped portion as a location guide for forming a transistor device partially upon the electrically-conducting region.
According to a further aspect of the invention, a semiconductor device includes an insulating layer made of insulating material; a semiconductor layer on the insulating layer, forming an interface therebetween, the semiconductor layer being made of a semiconductor material and including a body region of a first conductivity type and a source region of a second conductivity type, the source region adjoining the body region; and an altered interface region along at least a portion of the interface, the altered interface region electrically connecting the source region and the body region.
According to a still further aspect of the invention, a method of fabricating a semiconductor device includes the steps of forming a first wafer having a first semiconductor substrate, a first insulating layer on the semiconductor substrate, and an altered interface region along an interface between the semiconductor substrate and the insulating layer; bonding the first wafer to a second wafer having a second substrate and a second insulating layer on the substrate, the first and second insulating layers being bonded together; removing a portion of the first semiconductor substrate to leave a semiconductor thin film on the first insulating layer, and forming a body region of a first conductivity type and a source region of a second conductivity type in the thin film, the body region and the source region being electrically connected by the altered interface region.
To the accomplishment of the foregoing and related ends, the invention comprises the features hereinafter fully described and particularly pointed out in the claims. The following description and the annexed drawings set forth in detail certain illustrative embodiments of the invention. These embodiments are indicative, however, of but a few of the various ways in which the principles of the invention may be employed. Other objects, advantages and novel features of the invention will become apparent from the following detailed description of the invention when considered in conjunction with the drawings.
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Buynoski Matthew S.
Wollesen Donald L.
Fourson George
Pham Thanh V
Renner , Otto, Boisselle & Sklar, LLP
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