Leakage compensation circuit for Dynamic Random Access...

Details Leakage compensation circuit for Dynamic Random Access... Leakage compensation circuit for Dynamic Random Access...

2011-06-14

2011-06-14

Le, Thong Q (Department: 2827)

Static information storage and retrieval

Systems using particular element

Capacitors

C365S174000, C365S104000, C365S208000, C365S226000, C365S204000

Reexamination Certificate

active

07961498

ABSTRACT:
A Dynamic Random Access Memory (DRAM) cell comprising a leakage compensation circuit. The leakage compensation circuit allows a compensation current from a source to flow to the memory cell storage node of the DRAM cell to compensate the leakage current from the memory cell storage node of the DRAM cell to improve retention time.

REFERENCES:
patent: 7800400 (2010-09-01), Rahim et al.
patent: 2005/0285634 (2005-12-01), Doyle et al.
Wing K. Luk, “A 3-Transistor DRAM Cell with Gated Diode for Enhanced Speed and Retention Time”, IBM Thomas J. Watson Research Center, Yorktown Heights, NY 10598, IEEE 2006, pp. 1-2.

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