Metal working – Method of mechanical manufacture – Electrical device making
Reexamination Certificate
2002-07-26
2004-08-03
Arbes, Carl J. (Department: 3729)
Metal working
Method of mechanical manufacture
Electrical device making
C029S840000, C029S855000
Reexamination Certificate
active
06769174
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The present invention is directed in general to integrated circuits and, more specifically, to a leadframeless package structure and method.
BACKGROUND OF THE INVENTION
A conventional integrated circuit package generally comprises a leadframe made from 0.005-inch thick metal, an integrated circuit made of silicon, and a protective material to protect the electrical connections between the integrated circuit and the leadframe. The leadframe acts as an electrical and mechanical interface between the integrated circuit and the printed circuit board (PCB) on which the integrated circuit package is soldered. These packages are generally known as Dual-In-Line Package (DIP), Small Outline package (SO), or Quad Flat Package (QFP). In the manufacturing of these packages with leadframes, heavy industrial tools such as stamping and forming are required. These tools are expansive and dedicated to one package size and pin count. A leadframeless package is highly desirable because it requires a minimum of dedicated tooling such as, for example, one photomask and one solder ball fixture.
Recent development of higher pin count packages has substituted the leadframe with a fiberglass material. These packages are generally known as Ball Grid Array (BGA). The fiberglass material has metal foils (0.0015-inch thick) on the top and bottom sides and conductor patterns are etched on both sides to connect the die to the PCB.
Conventional packaging options for high performance integrated circuit dice include the use of a substrate or leadframe as a carrier. These are normally incorporated permanently in the final package structure. Disadvantages associated with these package structures include a limited ability to re-use the leadframe or substrate for another die. The leadframe or substrate becomes a fixed material cost for every package manufactured. The tooling for stamping the leadframe and the artwork for etching new substrates are quite substantial when there is a change in die size as the feature size of the integrated circuit is shrunk. In addition, the substrate or leadframe contributes to the thickness of the package structure, which is generally desired to be minimized. Also, when solder balls are used with the integrated circuit die, as in BGA packages, the width and depth of the package structure may be greater than desired due to the inclusion of the connections to the solder balls that are exterior to the area encompassed by the die.
SUMMARY OF THE INVENTION
In accordance with the present invention, a leadframeless package structure and method are provided that substantially eliminate or reduce disadvantages and problems associated with conventional systems and methods. In particular, a temporary carrier that is coupled to the structure during formation is removed after formation is complete, resulting in a structure without a leadframe.
According to one embodiment of the present invention, a leadframeless package structure is provided that includes a temporary carrier, a metal foil layer, an integrated circuit chip, a plurality of bonding wires, and a molding compound. After attaching the metal foil layer to the temporary adhesive/carrier system, the metal foil is patterned and etched (using conventional techniques commonly known in the PCB industry) to produce a set of planar electrical traces, die attach pads and bonding pads. The die is then attached (using conventional semiconductor assembly techniques) to the special die attach pad formed in the metal foil. Subsequently, conventional wirebond techniques are used to form electrical interconnects between the die and the electrical traces in the metal foil. Special pads are also provided in the metal foil for this purpose. Following a molding step, which encases the delicate wirebonds and die with a plastic which provides rigidity and protection, the temporary carrier portion is removed.
Technical advantages of one or more embodiments of the present invention include providing an improved leadframeless package structure. In a particular embodiment, a temporary carrier is coupled to the structure with a suitable adhesive layer during formation. The adhesive and carrier system are removed after molding. As a result, the chips attached to the structure have no leadframes or substrates. Accordingly, the leadframeless package structure has a reduced fixed cost of materials, is capable of accommodating large and small dice at minimum tooling cost, has a reduced thickness due to the absence of a carrier, and can provide a chip-scale package when second level interconnects (e.g., solder pads) are located within the approximate footprint of the die.
Other technical advantages will be readily apparent to one skilled in the art from the following figures, description, and claims.
Before undertaking the DETAILED DESCRIPTION OF THE INVENTION, it may be advantageous to set forth definitions of certain words and phrases used throughout this patent document: the terms “include” and “comprise,” as well as derivatives thereof, mean inclusion without limitation; the term “or,” is inclusive, meaning and/or; the phrases “associated with” and “associated therewith,” as well as derivatives thereof, may mean to include, be included within, interconnect with, contain, be contained within, connect to or with, couple to or with, be communicable with, cooperate with, interleave, juxtapose, be proximate to, be bound to or with, have, have a property of, or the like; and the term “controller” means any device, system or part thereof that controls at least one operation, such a device may be implemented in hardware, firmware or software, or some combination of at least two of the same. It should be noted that the functionality associated with any particular controller may be centralized or distributed, whether locally or remotely. Definitions for certain words and phrases are provided throughout this patent document, those of ordinary skill in the art should understand that in many, if not most instances, such definitions apply to prior, as well as future uses of such defined words and phrases.
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Chiu Anthony M.
Siegel Harry M.
Arbes Carl J.
Jorgenson Lisa K.
Munck William A.
STMicroeletronics, Inc.
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