Leadframe of a leadless flip-chip package and method for...

Details Leadframe of a leadless flip-chip package and method for... Leadframe of a leadless flip-chip package and method for...

2007-11-21

2009-10-13

Doan, Theresa T (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

With structure for mounting semiconductor chip to lead frame

C257S673000, C438S123000

Reexamination Certificate

active

07602053

ABSTRACT:
A leadframe of a leadless flip-chip package includes a plurality of inner leads, a nonconductive ink layer and a solder mask layer. The inner leads have a plurality of bump-connecting terminals, a plurality of outer terminals and a plurality of redistribution lead portions. A half-etched recession is formed on lower surfaces of the redistribution lead portions, and is filled with the non-conductive ink layer. The non-conductive ink layer fixes the redistribution lead portions onto the bump-connecting terminals. The solder mask layer is easily formed on the non-conductive ink layer and covers the inner leads.

REFERENCES:
patent: 5454905 (1995-10-01), Fogelson
patent: 5466966 (1995-11-01), Ito
patent: 5656550 (1997-08-01), Tsuji et al.
patent: 6452255 (2002-09-01), Bayan et al.
patent: 6498099 (2002-12-01), McLellan et al.
patent: 457662 (2001-10-01), None
patent: 463342 (2001-11-01), None
patent: 567598 (2001-11-01), None

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