Leadframe of a leadless flip-chip package and method for...

Details Leadframe of a leadless flip-chip package and method for... Leadframe of a leadless flip-chip package and method for...

2007-12-25

2007-12-25

Doan, Theresa (Department: 2814)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Assembly of plural semiconductive substrates each possessing...

C438S123000

Reexamination Certificate

active

11147918

ABSTRACT:
A leadframe of a leadless flip-chip package includes a plurality of inner leads, a non-conductive ink layer and a solder mask layer. The inner leads have a plurality of bump-connecting terminals, a plurality of outer terminals and a plurality of redistribution lead portions. A half-etched recession is formed on lower surfaces of the redistribution lead portions, and is filled with the non-conductive ink layer. The non-conductive ink layer fixes the redistribution lead portions onto the bump-connecting terminals. The solder mask layer is easily formed on the non-conductive ink layer and covers the inner leads.

REFERENCES:
patent: 5454905 (1995-10-01), Fogelson
patent: 5466966 (1995-11-01), Ito
patent: 5656550 (1997-08-01), Tsuji et al.
patent: 457662 (2001-10-01), None
patent: 463342 (2001-11-01), None
patent: 567598 (2001-11-01), None

Affiliated with

Also associated with

Rating

Leadframe of a leadless flip-chip package and method for... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Leadframe of a leadless flip-chip package and method for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Leadframe of a leadless flip-chip package and method for... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3889612