Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Entirely of metal except for feedthrough
Reexamination Certificate
2001-02-13
2003-05-06
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Entirely of metal except for feedthrough
C257S666000, C257S668000, C257S704000
Reexamination Certificate
active
06559535
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to sealing packages for integrated circuits, and more particularly, a lead frame for a sealing package.
2. Description of the Related Art
Due to the decreasing size constraints on micro-electronic circuits and the increasing demands on the circuits, there is a demand for smaller and more efficient circuit devices. According to the prior art, one way that integrated circuit chips or dyes are incorporated into electronic circuits is by containment inside a sealing package device. The sealing package device provides connections between the integrated circuit chip and voltage sources and voltage outputs, and provides connections to ground for the sealing package and dye.
An example of a sealing package
1
of the prior art is depicted in
FIGS. 1
a
and
1
b
. The sealing package
1
has a top portion or lid
5
and a bottom portion or base
6
. In between the top portion
5
and bottom portion
6
, there is a lead structure of 32 leads
2
with 8 leads
2
extending from each of four sides
3
. Also, a seal (not shown) exists between the top and bottom portion. Each lead
2
has an external lead portion, which extends outside the sealing package
1
and an internal lead portion (not shown) inside the sealing package
1
. The leads
2
along each side
3
are equidistantly separated. In addition, both the internal and external lead portions are approximately perpendicular to a side of the sealing package
1
.
An integrated circuit chip or dye (not shown) is contained in the interior of the sealing package
1
. The dye is placed in a cavity
4
. The cavity
4
is formed in between the top portion
5
and bottom portion
6
. The lead portions internal to the sealing package
1
are connected to the dye and or sealing package
1
and provide connections to the circuitry on the exterior of the sealing package
1
via the external portion of the leads
2
.
Conventional sealing packages have several disadvantages that limit electrical efficiency. For example, the use of plastic as a material for encapsulating the dye lowers the electrical performance of the package because the plastic actually touches the chip. Also, it is difficult to manufacture such a small device with the 32 separate and equidistant leads on the interior and exterior of the sealing package.
SUMMARY OF THE INVENTION
The invention overcomes the aforementioned problems by providing a novel lead structure, preferably in a sealing package made of glass and metal rather than plastic. Conventional glass and metal sealing packages only exist with a total of 24 leads, but the lead structure according to the present invention allows a 32 lead glass to metal sealing package having 32 external lead portions to be manufactured.
A preferred embodiment of the invention is a lead structure for sealing package for an integrated circuit chip. The lead structure includes a lead member for providing a lead internal to the sealing package and more than one lead external to the sealing package. There may be two leads external to the sealing package with a first external lead on a first side of the sealing package and a second external lead on a second side of the sealing package, and the second side of the sealing package intersecting the first side of the sealing package.
The lead member is situated proximate or at a corner of the sealing package. The lead member can be situated such that the internal lead substantially bisects a corner of the sealing package formed by the first and second sides, and the first and second external leads are substantially parallel to the first and second sides, respectively.
The first and second external leads define an angle there between. The angle may, for example, be 90 degrees. Also, the first lead member is adapted to provide connections to a ground for two intersecting sides of the sealing package by having the first and second external leads adapted to be connected to a ground and the internal lead adapted to be connected to the sealing package.
The invention also includes a lead structure for a sealing package for an integrated circuit chip including a plurality of lead members having a lead portion internal to the sealing package and a lead portion external to the sealing package. The plurality of lead members are adapted to provide connections between an integrated circuit chip inside the sealing package and a ground and a voltage reference. The voltage reference may include a voltage source and a voltage drain.
The lead structure of the plurality of lead members includes external lead portions, which are substantially parallel to each other. Also, the internal lead portions are arranged along a side of the sealing package such that a first angle is in between an internal lead portion and the side and a second angle is in between another internal portion and the side.
The invention also includes a sealing package device for an integrated circuit chip. The sealing package includes a plurality of first leads for providing a connection to a ground for each of two intersecting sides of the package device, and a plurality of second leads for providing connections between an integrated circuit chip internal to the package and a voltage source and a voltage drain between the package and the ground. Further, each of the plurality of first leads is adapted to provide two connections on the exterior of the package and one connection on the interior of the package. Also, each of the plurality of second leads is adapted to provide one connection interior to the package and one connection exterior to the package.
The invention is also embodied in a package device for an integrated circuit chip, which includes a base and a lid with an integrated circuit chip, a first type of lead members and a second type of lead members between the base and lid. The first plurality of leads having a first lead portion, a second lead portion, and a third lead portion with the first lead portion being connected to the base, and the second lead portion and the third lead portion being external to the base and the lid. The second plurality of leads between the lid and the base, the second plurality of leads being connected to the integrated circuit chip. Further, the base and the lid do not touch the chip.
The base includes a corner and at least one of the first plurality of leads is positioned proximate the corner. Also, at least one of the first plurality of leads may be positioned at the corner.
The first and second plurality of leads of the package device are adapted to provide connections along a side of the package device. The connections alternate between a ground and a reference voltage.
The second plurality of leads includes at least one lead with a first lead portion thereof adapted to be connected to a voltage source and the second lead portion thereof adapted to be connected to the integrated circuit chip; at least one lead with a first lead portion thereof adapted to be connected to a voltage drain and a second lead portion thereof adapted to be connected to an integrated circuit chip; and at least one lead with a first lead portion thereof adapted to be connected to a ground and a second lead portion thereof adapted to be connected to the base.
The base and lid are substantially the same shape, have a plurality of corners and the lid does not overlap a periphery of the base. The lid includes a top layer of metal and a bottom layer of glass and the base includes a bottom layer of metal and a top layer of glass. A hermetic seal is between the glass layer of the lid and glass layer of the base and holds the base and lid together.
Internal to the sealing substrate, the base and lid define a cavity into which the chip is placed. The cavity reaches from the bottom layer of metal of the base to the top layer of metal of the lid and the layers of glass on the sides. Also, the base and lid both have inner portions with a smaller thickness than the outer portions.
The invention also includes an integrated circuit including a base and a lid
Crispell Robert B.
Nelson Mark J.
Agere Systems Inc.
Andújar Leonardo
Flynn Nathan J.
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