Lead-on-chip semiconductor device package having an adhesive lay

Details Lead-on-chip semiconductor device package having an adhesive lay Lead-on-chip semiconductor device package having an adhesive lay

1997-08-21

1999-04-27

Picardat, Kevin M.

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Including adhesive bonding step

438106, H01L 2144, H01L 2148, H01L 2150

Patent

active

058973397

ABSTRACT:
A lead-on-chip semiconductor device package is formed by attaching a lead frame having a single adhesive layer to a semiconductor chip. Electrode pads of the chip are electrically connected by bonding wires and mechanically connected by the adhesive layer to the lead frame, and then encapsulated by an encapsulant such as molding compound. The adhesive layer is formed from a liquid adhesive having a certain viscosity. The adhesive material is continuously applied to spaces between adjacent inner leads as well as the top surface of the leads and then cured. The leads are disposed at the same intervals and include some side leads with a larger width in order to form the adhesive layer with a uniform thickness. Thermoplastic resins are preferably used as the adhesive, but thermosetting resins may be used as well. In the case of thermoplastic resins, the temperature of a cure step is about 200.degree. C. and that of chip attachment step is about 400.degree. C.

REFERENCES:
patent: 5180691 (1993-01-01), Adachi et al.
patent: 5378656 (1995-01-01), Kajihara et al.
patent: 5612259 (1997-03-01), Okutomo et al.
patent: 5631191 (1997-05-01), Durand et al.

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