Lead frame clock distribution for integrated circuit memory devi

Details Lead frame clock distribution for integrated circuit memory devi Lead frame clock distribution for integrated circuit memory devi

1996-08-22

1997-06-17

Fears, Terrell W.

Static information storage and retrieval

Addressing

Sync/clocking

365 51, 36518904, G11C 1300

Patent

active

056403623

ABSTRACT:
Clock pads are distributed over an integrated circuit memory device and electrically connected to a lead frame to synchronously provide an external clock signal to the clock pads. Accordingly, an internal clock signal is generated throughout the integrated circuit memory device by distributing an external clock signal using a lead frame and pads. Internal circuitry for generating and synchronizing an internal clock from an external clock is thereby not required. When the integrated circuit memory device includes multiple memory array banks, the clock pads may be located in a row of input/output pads adjacent a memory array bank or between pairs of memory array banks.

REFERENCES:
patent: 5499216 (1996-03-01), Yamamoto

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