Lead frame chip scale package

Details Lead frame chip scale package Lead frame chip scale package

1999-09-20

2003-07-08

Whitehead, Jr., Carl (Department: 2813)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Making plural separate devices

C438S111000, C438S113000, C438S123000, C438S124000, C257S676000

Reexamination Certificate

active

06589814

ABSTRACT:

BACKGROUND INFORMATION
Field of the Invention
The present invention relates to integrated circuit packages, and more specifically, to the production of a chip scale integrated circuit package using a lead frame.
The use of a lead frame provides an inexpensive means for IC package manufacturing. Etching or stamping a sheet of thin metal to produce the desired lead frame patterns is a well-known manufacturing process, and is conducive to high-volume, low-cost production. In addition, the lead frame panel provides a support framework for the IC chips during IC package assembly. However, as IC chip device densities increase and IC package sizes decrease, the geometries used in the electrical communication paths between the IC chip and the PCB decrease. For example, a chip scale package requires that the protective casing be no more than 20% larger than the IC chip. As a result, the area available for the electrical paths provided by the lead frame is significantly reduced, demanding much finer lead frame patterns. In order to construct that finer geometry, the lead frame thickness must be reduced to a point where the lead frame panel rigidity would no longer be sufficient to provide the necessary support during the IC package assembly process. Also, the fragile lead frame patterns would be more susceptible to damage during the manufacturing process. As a result, chip scale IC packages must use more costly techniques such as tape automated bonding (TAB) or printed substrate backing.
Accordingly, it is desirable to provide an IC packaging method that allows the use of a lead frame in a chip scale package.
SUMMARY OF THE INVENTION
The present invention provides a method for producing chip scale IC packages using lead frames. A temporary support fixture provides support and stability to a thin lead frame panel having the fine geometries required for higher-density IC chip interfaces. An embodiment of the support fixture includes an adhesive pad made of one-sided sticky tape mounted to a rigid frame made of stainless steel, the rigid frame maintaining the adhesive pad in a fixed configuration providing a stable flat surface for support of the lead frame panel. Alternatively, the rigid frame and adhesive pad can be made of any materials compatible with the IC package manufacturing process and capable of supporting the lead frame panel through the manufacturing process. The adhesive pad can also be patterned to ease the manufacturing process. The rigid frame can include positioning features to assist in the alignment of the lead frame and adhesive pad. If encapsulant material is to be dispensed over the lead frame panel, a containment dam can be formed around the lead frame after it is installed on the adhesive pad, to provide a boundary for encapsulant material flow.


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