Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With structure for mounting semiconductor chip to lead frame
Reexamination Certificate
2002-05-24
2004-12-07
Pham, Long (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
With structure for mounting semiconductor chip to lead frame
C257S666000, C257S684000, C257S692000, C257S693000, C257S730000
Reexamination Certificate
active
06828661
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a lead frame including leads each having a land electrode at an external terminal thereof, to a resin-sealed semiconductor device of land grid array (LGA) type using the lead frame, and to a method for fabricating the same.
With the recent miniaturization of electronic equipment, high-density mounting has been required of semiconductor components including resin-sealed semiconductor devices. To meet the requirement, the semiconductor components have been reduced increasingly in size and thickness. In particular, the resin-sealed semiconductor devices have been increased in the number of pins used therein, while they have been reduced in size and thickness. As a result, a resin-sealed semiconductor device which allows high-density pin placement has been in growing demand.
Referring to the drawings, a lead frame used in a conventional resin-sealed semiconductor device will be described.
FIGS. 9A and 9B
show a conventional lead frame of QFP (quad flat package) type, of which
FIG. 9A
shows a plan structure thereof and
FIG. 9B
shows a cross-sectional structure thereof along the line IXb—IXb of FIG.
9
A.
As shown in
FIG. 9A
, a lead frame
100
has: a square framework portion
101
; a tie-bar portion
102
provided internally of the framework portion
101
; suspension leads
103
; a die pad portion
104
supported by each of the corners of the die-bar portion
102
and by the suspension leads
103
; a plurality of inner leads
105
having respective one ends connected to the tie-bar portion
102
and the respective other ends opposing the die pad portion
104
; and outer leads
106
having respective one ends connected to the framework portion
101
and the respective other ends connected to the inner leads
105
via the tie-bar portion
102
.
As shown in
FIG. 9B
, the die pad portion
104
has a chip carrying surface pressed down by a depressing process to be lower in level than the top surfaces of the inner leads
105
. The lead frame
100
shown in
FIG. 9A
is normally arranged in a repeated pattern in the same plane.
FIG. 10
shows a cross-sectional structure of a conventional resin-sealed semiconductor device using the lead frame
100
.
As shown in
FIG. 10
, the conventional resin-sealed semiconductor device has a semiconductor chip
107
fixedly attached onto the die pad portion
104
by using a soldering material or the like. The semiconductor chip
107
is electrically connected to the individual inner leads
105
by metal fine wires
108
.
The components disposed internally of the tie-bar portion
102
shown in
FIG. 9A
, i.e., the semiconductor chip
107
, the die pad portion
104
, and the inner leads
105
are sealed integrally with a sealing resin material to form a resin-sealed portion
109
. The tie-bar portion
102
serves as a resin stopper during the injection of the sealing resin material. After the framework portion
101
is cut away, the tie-bar portion
102
is divided in such a manner as to insulate the outer leads
106
adjacent to each other. The outer leads
106
protruding from each of the side surfaces of the resin sealed portion
109
are processed (by bending) to have respective end portions which are nearly flush with the bottom surface of the resin-sealed portion
109
.
In the conventional lead frame
100
, however, the width of each of the inner and outer leads
105
and
106
(hereinafter referred to as the leads
105
and
106
) is limited if a plurality of semiconductor elements are formed at a higher density in the semiconductor chip
107
and a larger number of pins are used. In such a multi-pin configuration, the number of the leads
105
and
106
is increased accordingly so that the size of the whole lead frame
100
is increased disadvantageously. As a result, the whole resin-sealed semiconductor device is naturally increased in size, which prevents the resin-sealed semiconductor device from being reduced in size and thickness.
If the number of the leads
105
and
106
is increased without changing the outer size of the lead frame
100
, the width of each of the leads
105
and
106
should be reduced, which makes it difficult to perform processing such as etching in the fabrication of the lead frame
100
.
As a semiconductor device of surface-mount type, there has recently been developed a resin-sealed semiconductor device of, e.g., so-called ball grid array (BGA) type or land grid array (LGA) type wherein a semiconductor chip placed on the top surface of a carrier (wiring board) having external electrodes such as ball electrodes or land electrodes provided on the bottom surface thereof is electrically connected and sealed with a resin. Such a semiconductor device of surface-mount type is mounted on a mother board (mounting board) at the bottom surface thereof and has been becoming mainstream.
Under the circumstances, the problem has been encountered that a semiconductor device of QFP type, i.e., the conventional lead frame
100
in which external electrodes composed of the outer leads
106
are formed only on the side surfaces of the package (resin sealed portion
109
) shown in
FIG. 10
is incompatible with the grid array type.
On the other hand, the semiconductor device of BGA or LGA type has the problem that production cost cannot easily be reduced since it uses a relatively high-cost carrier (wiring board) as a member for holding a semiconductor chip.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to solve the foregoing conventional problems and thereby provide a lead frame which allows bottom surface mounting by using a frame member integrally formed with a die pad. Another object of the present invention is to increase the reliability of a resin-sealed semiconductor device using the frame member.
To attain the object, a lead frame according to the present invention comprises: a die pad portion supported internally of a framework portion by suspension leads; and a plurality of leads each having one end connected to the framework portion and the other end opposed to the die pad portion, the die pad portion having a holding region formed from a part of an upper surface of the die pad portion which has been elevated above the remaining part thereof, the holding region having an opening formed to extend therethrough in a front-to-back direction of the die pad portion.
If the lead frame according to the present invention is sealed with a resin such that the respective bottom surfaces of the leads are exposed from the bottom surface of a package, the bottom surfaces of the leads form external terminals. This allows an LGA-type package to be implemented by using a frame member without using a wiring board. Since the opening is formed in the holding region for a semiconductor chip to extend therethrough in the front-to-back direction, a sealing resin material is also filled in a space underlying the bottom surface of the die pad portion through the opening so that each of the upper and lower sides of the die pad portion is covered with the sealing resin material. As a result, so-called “resin balance” which is the balance between the resin residing in the die pad portion and the resin residing in the semiconductor chip is improved. The improved resin balance prevents the peeling off of the resin or a crack caused in the resin sealed portion by a thermal stress resulting from the difference between the respective thermal expansion coefficients of the die pad portion and the sealing resin material or between those of the semiconductor chip and the sealing resin material and thereby prevents a crack occurring in the semiconductor chip. Accordingly, the reliability of a resin-sealed semiconductor device using the lead frame according to the present invention is increased significantly.
In one aspect of the lead frame according to the present invention, the opening formed in the holding region preferably includes a plurality of openings and one of the openings is provided preferably at a position opposing a position at which an injection gate for
Araki Masanao
Ono Takashi
Uchida Hideo
Matsushita Electric - Industrial Co., Ltd.
McDermott Will & Emery LLP
Nguyen Dilinh
Pham Long
LandOfFree
Lead frame and a resin-sealed semiconductor device... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Lead frame and a resin-sealed semiconductor device..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Lead frame and a resin-sealed semiconductor device... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3333366