Lead connections means for stacked tab packaged IC chips

Details Lead connections means for stacked tab packaged IC chips Lead connections means for stacked tab packaged IC chips

1991-11-25

1992-08-11

Hille, Rolf

Electricity: conductors and insulators

Feedthrough or bushing

Compression

357 70, 357 69, 357 80, 357 74, 174 524, H01L 2316, H01L 2348, H01L 2944, H01L 2960

Patent

active

051384388

ABSTRACT:
In the present invention, memory chips are stuck together in stacked fashion by TAB (tape automated bonding), and a multiple memory chip and lead complex like an SOP (small out-line package) is formed of the chips and leads, whereby a memory module of high packaging density can be realized by a flat packaging technique.

REFERENCES:
patent: 4109096 (1978-08-01), Dehaine
patent: 4363076 (1982-12-01), McIver
patent: 4763188 (1988-08-01), Johnson
Tsuda et al., "The LSI Package is Diversifying its Technological Performance . . . ", Ed. Nikkei Electronics, p. 148.

Affiliated with

Also associated with

Rating

Lead connections means for stacked tab packaged IC chips does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Lead connections means for stacked tab packaged IC chips, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Lead connections means for stacked tab packaged IC chips will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-351071