Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With heat sink means
Reexamination Certificate
2006-02-28
2006-02-28
Munson, Gene M. (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
With heat sink means
C257S666000, C257S676000, C257S787000
Reexamination Certificate
active
07005728
ABSTRACT:
A substrate for use in an inline IC package is designed such that its die attach pad and leads each have a number of protrusions and recesses. These protrusions and recesses create an irregular surface that provides better adhesion to encapsulant material than conventional leads and die attach pads, whose smooth, straight surfaces risk delamination of the encapsulant material.
REFERENCES:
patent: 3574815 (1971-04-01), Segerson
patent: 4032706 (1977-06-01), Paletto
patent: 4258381 (1981-03-01), Inaba
patent: 4451973 (1984-06-01), Tateno et al.
patent: 5314298 (1994-05-01), Kim
patent: 5422788 (1995-06-01), Heinen et al.
patent: 5434750 (1995-07-01), Rostoker et al.
patent: 6114750 (2000-09-01), Udagawa et al.
patent: 6215662 (2001-04-01), Peter et al.
patent: 6291262 (2001-09-01), Udagawa et al.
patent: 6399415 (2002-06-01), Bayan et al.
patent: 6541284 (2003-04-01), Lam
U.S. Appl. No. 10/831,537, entitled “Sawn Power Package and Method of Fabricating Same”, by inventors: Hwa et al., filed Apr. 22, 2004.
National Semiconductor Corporation, Internal Document, entitled “Single-In-Line Flange Mounted”, undated, one page.
National Semiconductor Corporation, Internal Document, entitled “TO-220, Molded, 5 Lead, Straight”, dated Jan. 21, 2002, one page.
National Semiconductor Corporation, Internal Document, JEDEC Solid State Product Outlines, entitled “Plastic Thin Shrink Small Outline Package”, dated May of 2001, 18 pages.
National Semiconductor Corporation, Internal Document, entitled “Molded TSSOP, JEDEC, EXP PAD, 5.0×4.4×0, 9mm BODY, 14 LD, 0.65mm PITCH”, dated Feb. 12, 2003, one page.
National Semiconductor Corporation, Internal Document, entitled “Molded MINI-SO, .118×.118×.034 in BODY, 8 LD, 0.256 in PITCH”, dated Nov. 18, 1996, one page.
Beyer Weaver & Thomas LLP
Munson Gene M.
National Semiconductor Corporation
LandOfFree
Lead configuration for inline packages does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Lead configuration for inline packages, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Lead configuration for inline packages will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3668053