LDMOS transistor

Details LDMOS transistor LDMOS transistor

2006-10-10

2006-10-10

Nguyen, Cuong (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S343000

Reexamination Certificate

active

07119399

ABSTRACT:
A semiconductor device has a semiconductor substrate, an insulating layer on top of the substrate, a lateral field effect transistor with a drain region and a source region arranged in the substrate and a gate arranged above the substrate within the insulating layer, a drain runner arranged on top of the insulator layer above the drain region, a source runner arranged on top of the insulator layer above the source region, a gate runner arranged on top of the insulator layer outside an area defined by the drain runner and the source runner, a first coupling structure with a via for coupling the drain runner with the drain region, and a second coupling structure with a via for coupling the source runner with the source region.

REFERENCES:
patent: 4811075 (1989-03-01), Eklund
patent: 5155563 (1992-10-01), Davies et al.
patent: 5252848 (1993-10-01), Adler et al.
patent: 5313082 (1994-05-01), Eklund
patent: 5654589 (1997-08-01), Huang et al.
patent: 5693563 (1997-12-01), Teong
patent: 6168983 (2001-01-01), Rumennik et al.
patent: 6563171 (2003-05-01), Disney
patent: 6600182 (2003-07-01), Rumennik
patent: 6664186 (2003-12-01), Callegari et al.
patent: 6707102 (2004-03-01), Morikawa et al.
patent: 2002/0179945 (2002-12-01), Sakamoto et al.
J.A. Appels and H.M.J. Vaes, “High voltage thin layer devices (RESURF devices)”, IEDM technical digest, pp. 238-241, 1979.
H.M.J. Vaes and J.A. Appels, “High voltage high current lateral devices”, IEDM technical digest, pp. 87-90, 1980
T. Fujihira, “Theory of Semiconductor Superjunction Devices”, Jpn. J. Appl. Phys., vol. 36, pp. pp. 6254-6262, 1997.
G. Deboy, et al., “A new generation of high voltage MOSFETs breaks the limit line of silicon”, IEDM technical digest, pp. 683-685, 1998.
A. Ludikhuize, “A review of RESURF technology”, Proc. of ISPSD, p. 11, 2000.
J. Cai, et al., A novel high performance stacked LDD RF LDMOSFET, IEEE Electron Device Lett., vol. 22, No. 5, pp. 236-238, 2001.
J.G. Mena and C.A.T. Salama, “High voltage multiple-resistivity Drift-Region LDMOS”, Solid State Electronics, vol. 29, No. 6, pp. 647-656, 1986.
M.D. Pocha and R.W. Dutton, “A computer-aided design model for High-Voltage Double Diffused MOS (DMOS) Transistors”, IEEE Journal of Solid-State Circuits, vol. SC-11, No. 5, 1976.
I. Yoshia, et al.; “Highly Efficient 1.5 GHz Si Power MOSFET for Digital Cellular Front End”, Proceedings of International Symposium on Power Semiconductor Devices & ICs; Tokyo, pp. 156-157,1992.
Helmut Brech et al; “Record Efficiency and Gain at 2.1 GHz of Hih Power RF Transistors for Cellular and 3G Base Stations”; RF & DSP INfrastructure Devision, Semiconductor Products Sector, Motorola, Tempe, Arizona, 2003.
Brech H., et al., “Record Efficiency and Gain at 2.1 GHz of High Power RF Transistors for Cellular and 3G Base Stations”, International Electron Devices Meeting, Technical Digest, pp. 359-362, Dec. 8, 2003.
International Search Report. PCT/EP2005/001953, 16 pages, Nov. 28, 2005.

Affiliated with

Also associated with

Rating

LDMOS transistor does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with LDMOS transistor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and LDMOS transistor will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3658836