LDMOS devices with improved architectures

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S337000, C257S343000, C257SE29256, C257SE27060, C257SE21616, C257SE21417, C438S276000, C438S307000

Reexamination Certificate

active

07977715

ABSTRACT:
An LDMOS device includes a substrate of a first conductivity type, an epitaxial layer on the substrate, a buried well of a second conductivity type opposite to the first conductivity type in a lower portion of the epitaxial layer, the epitaxial layer being of the first conductivity type below the buried layer. The device further includes a field oxide located between a drain and both a gate on a gate oxide and a source with a saddle shaped vertical doping gradient of the second conductivity type in the epitaxial layer above the buried well such that the dopant concentration in the epitaxial layer above the buried well and below a central portion of the field oxide is lower than the dopant concentration at the edges of the field oxide nearest the drain and nearest the gate.

REFERENCES:
patent: 5348895 (1994-09-01), Smayling et al.
patent: 5583365 (1996-12-01), Villa et al.
patent: 5589409 (1996-12-01), Bulucea et al.
patent: 6979875 (2005-12-01), Kwon et al.
patent: 2002/0109184 (2002-08-01), Hower et al.
patent: 2004/0033666 (2004-02-01), Williams et al.
patent: 2004/0259318 (2004-12-01), Williams et al.
patent: 2005/0253216 (2005-11-01), Tsuchiko
patent: 2006/0057784 (2006-03-01), Cai et al.
patent: 2007/0212823 (2007-09-01), Ren et al.
International Search Report and Written Opinion of Corresponding PCT Application No. PCT/US2009/036632 completed Oct. 16, 2009 by the ISA (KR), total 7 pages.

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