Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-11-20
2004-07-13
Loke, Steven (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S409000
Reexamination Certificate
active
06762457
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to laterally diffused metal oxide semiconductor (LDMOS) transistors.
BACKGROUND OF THE INVENTION
Lateral Diffused Metal Oxide Semiconductor devices (LDMOS) are employed in various power control and amplifier applications. In the latter use, the operation is often constrained in frequency by the gate to drain overlap capacitance as well as reliability issues that relate to the electric field in the vicinity of the drain and its effect on “hot carrier aging.” Past attempts to minimize these problems deviate from using a gate oxide of uniform thickness by placing one edge of the gate over a region of thicker oxide (thicker than gate oxide) as shown in prior art
FIGS. 1 and 2
. Presently, this thicker oxide is grown first and the gate is then aligned to the thicker oxide. This results in uncertain device characteristics due to the vagaries of the alignment and shape of the transition region between the thick and thin oxide regions.
There are several disadvantages to using a uniform gate oxide thickness and the prior art structures of FIGS.
1
&
2
:
A. With a uniform gate oxide, the gate to drain (N-region) overlap capacitance is large, which limits the frequency response of the LDMOS.
B. The abrupt transition from the gate-to-N-region oxide transition is significant, which results in a high electric field and, thus, undesirable hot carrier generation and possibly low breakdown voltage.
The gate oxide thickness significantly determines the threshold voltage of the device and the maximum gate voltage, so increasing the gate oxide thickness to improve (A) and (B) above result in a high threshold voltage, V
TH
, and a low transconductance.
SUMMARY OF THE INVENTION
The invention includes a laterally diffused metal oxide semiconductor transistor comprising a gate electrode and comprising tapered oxide self aligned to the gate electrode and a method of making the transistor.
REFERENCES:
patent: 5378912 (1995-01-01), Pein
patent: 5777363 (1998-07-01), Malhi
patent: 5783474 (1998-07-01), Ajit
patent: 6046474 (2000-04-01), Oh et al.
patent: 2-283072 (1990-11-01), None
“Silicon Processing for the VLSI Era, vol. 3—The Submicron MOSFET” by Wolf, 1995, pp. 330-331.
Pearce Charles Walter
Shibib Muhammed Ayman
Agere Systems Inc.
Loke Steven
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