Layout solution for electromagnetic interference reduction

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257355, 257207, H01L 2362

Patent

active

059693908

ABSTRACT:
A polysilicon resistor is added between a source (ground or power) of an EMI core circuitry and a source of the EMI peripheral circuitry. In this way, the electromagnetic interference of an integrated circuit is reduced. The added polysilicon resistor reduces the di/dt of the current passing between the power and the ground of the EMI core circuitry so that the EMI is reduced.

REFERENCES:
patent: 4527213 (1985-07-01), Ariizumi
patent: 4893168 (1990-01-01), Takahashi et al.
patent: 5019883 (1991-05-01), Mori et al.
patent: 5218222 (1993-06-01), Roberts
patent: 5430595 (1995-07-01), Wagner et al.
patent: 5473169 (1995-12-01), Ker et al.
patent: 5811856 (1998-09-01), Lee

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