Layout of semiconductor devices to increase the packing density

Details Layout of semiconductor devices to increase the packing density Layout of semiconductor devices to increase the packing density

1998-03-02

2000-07-04

Crane, Sara

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257343, 257401, H01L 31119

Patent

active

060842660

ABSTRACT:
A first mask includes a plurality of vertical portions and a plurality of horizontal portions. The vertical portions and the horizontal portion are crossed, thereby forming a plurality of closed areas. A second mask is placed over the first mask that exposes the closed areas for forming sources and drains. A third mask formed over the closed areas to expose a portion of the closed areas for forming contact holes, and a fourth mask includes a first portion and a second separated portion, the first portion and the separated second portion cover the first contact holes.

REFERENCES:
patent: 4636825 (1987-01-01), Baynes
patent: 4821084 (1989-04-01), Kinugasa et al.
patent: 5447876 (1995-09-01), Moyer et al.
patent: 5672894 (1997-09-01), Maeda et al.
Wolf, Stanley, and Tauber, Richard, Silicon Processing for the VLSI Era, Lattice Press, 1986, pp. 476-489.

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