Layout of networks using parallel and series elements

Details Layout of networks using parallel and series elements Layout of networks using parallel and series elements

2005-01-25

2005-01-25

Siek, Vuthe (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

06848092

ABSTRACT:
Disclosed are systems, methods, and algorithms for network layout. A network layout having subnetworks of matching series and parallel elements is systematically generated to implement the network within area constraints. After the selection of the number of rows of network elements, the number of elements in each row, the sequencing of the elements, and the element locations, are systematically determined. The network layout systematically produced reduces the influence of unfavorable factors on the network such as temperature gradients, process gradients, and interference, by dispersing subnetwork elements throughout the layout.

REFERENCES:
patent: 3686593 (1972-08-01), Zakaria
patent: 6405356 (2002-06-01), Yang
patent: 6539533 (2003-03-01), Brown et al.
U.S. Appl. No. 10/217,285, filed Aug. 12, 2002, Du, Jaska.

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