Layout of a flash memory having symmetric select transistors

Details Layout of a flash memory having symmetric select transistors Layout of a flash memory having symmetric select transistors

2006-04-04

2006-04-04

Nelms, David (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S315000, C257S316000, C438S257000, C438S259000, C365S185050, C365S185120

Reexamination Certificate

active

07023045

ABSTRACT:
A layout of flash memory having symmetric select transistors includes a memory cell array and a polysilicon gate. The polysilicon gate forms a plurality of select transistors in coordination with a plurality of pairs of sources/drains, so as to connect to the memory cell array. The polysilicon is perpendicularly extended toward a direction of the memory cell array, thereby overcoming a drawback as select transistors being unsymmetrical in a prior flash memory structure.

REFERENCES:
patent: 6438028 (2002-08-01), Kobayashi et al.
patent: 6845042 (2005-01-01), Ichige et al.
patent: 2003/0094635 (2003-05-01), Yaegashi

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