Layout design device and layout method

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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Details

C716S030000, C716S030000

Reexamination Certificate

active

07865860

ABSTRACT:
A layout design device according to an exemplary aspect of the present invention is a layout design device for designing layout of an integrated circuit, including a routing section for adjacently wiring a signal line having a high activity rate and a signal line having a low activity rate based on an activity rate of the signal line of each circuit element.

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patent: 6950998 (2005-09-01), Tuan
patent: 7360193 (2008-04-01), Burstein et al.
patent: 7464359 (2008-12-01), Habitz et al.
patent: 7555741 (2009-06-01), Milton et al.
patent: 2007/0220473 (2007-09-01), Goto
patent: 2007/0226673 (2007-09-01), Habitz et al.
patent: 2009/0241079 (2009-09-01), Binder et al.
patent: 09269958 (1997-10-01), None

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