Layout design apparatus, layout design method, and computer...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000

Reexamination Certificate

active

11704273

ABSTRACT:
A frame input unit receives an input of a frame having a placement area for an element to which a predetermined signal is supplied. A netlist input unit receives an input of a netlist concerning the element. A placing unit places the element in the placement area of the frame input by the frame input unit based on the netlist input by the netlist input unit. A detecting unit detects whether there is a vacant position in the placement area in which the element is placed by the placing unit, and a bypass-element placing unit places a bypass element at the vacant position detected by the detecting unit, the bypass element propagating the predetermined signal by bypassing the element located adjacent to the vacant position.

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Fujitsu Releases AccelArray™ Structured ASIC Devices http://pr.fujitsu.com/en
ews/2003/06/26.html.

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