Layout and structure of memory

Details Layout and structure of memory Layout and structure of memory

2011-01-11

2011-01-11

Nguyen, Cuong Q (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S314000, C257S315000, C257S316000, C257S330000, C257SE29129, C257SE29300

Reexamination Certificate

active

07868377

ABSTRACT:
A flash memory is provided. The flash memory features of having the select gate transistors to include two different channel structures, which are a recessed channel structure and a horizontal channel. Because of the design of the recessed channel structure, the space between the gate conductor lines, which are for interconnecting the select gates of the select gate transistors arranged on the same column, can be shortened. Therefore, the integration of the flash memory can be increased; and the process window of the STI process can be increased as well. In addition, at least one depletion-mode select gate transistor is at one side of the memory cell string. The select gate transistor of the depletion-mode is always turned on.

REFERENCES:
patent: 5936887 (1999-08-01), Choi
patent: 6995414 (2006-02-01), Yaegashi
patent: 7456466 (2008-11-01), Om et al.
patent: 1893086 (2007-01-01), None

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