Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2007-06-19
2007-06-19
Ray, Gopal C. (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C711S105000, C711S148000
Reexamination Certificate
active
11023969
ABSTRACT:
A method and apparatus includes a plurality of processor groups each having a plurality of processor switch chips each having a plurality of processors and a processor crossbar, each processor connected to the processor crossbar; a plurality of switch groups each having a plurality of switch crossbar chips each having a plurality of switch groups each having a plurality of switch crossbar chips each having a plurality of switch crossbars each connected to a processor crossbar in each processor group, wherein no two switch crossbars in a switch group are connected to the same processor crossbar; a plurality of memory groups having a plurality of memory switch chips each having a plurality of memory controllers and a memory crossbar, each memory controller connected to the memory crossbar, each memory crossbar in each memory group connected to all of the switch crossbar in a corresponding one of the switch groups, wherein no two memory groups are connected to the same switch group.
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“Design of a 64-processor by 128-memory crossbar switching network” by Miracky et al. (abstract only) Publication Date: Oct. 3-5, 1988.
Cheng Christopher Thomas
Purcell Stephen Clark
Pasternak Solutions LLC
Ray Gopal C.
Townsend and Townsend / and Crew LLP
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