Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Patent
1997-12-22
1999-11-16
Powell, William
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
438 16, 438694, H01L 2100
Patent
active
059857641
ABSTRACT:
A method is disclosed for aligning wafers independent of the planarity of layers that are formed on a wafer. In prior art, it is found that when aligning wafers from the front or device side, the alignment of the masks vary because of the variations on the topography of the particular layer in process. Since the topography of a layer is influenced by the cumulative effect of the number of underlying features that are disposed on top of each other, severe misalignments can occur causing defective parts. The problem is eliminated by depositing an infrared reflective (IR) coating over alignment marks formed on oxide layer covering the devices on a wafer, and performing alignment with respect to the reflective marks by projecting IR energy through an IR transparent stage placed under the backside of the wafer and using an IR microscope. Since silicon substrate is also IR transparent, alignment can be performed from the back side in exactly the same way each time the wafer is aligned independent of the layer topography on the front side.
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Chung Wen-Jye
Lin Chuan-Chieh
Ackerman Stephen B.
Powell William
Saile George O.
Taiwan Semiconductor Manufacturing Company , Ltd.
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