Laterally diffused MOS transistor having N+ source contact...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S342000, C257S328000, C257S329000, C257S344000, C257S408000, C257S330000

Reexamination Certificate

active

07061057

ABSTRACT:
Reduced source resistance is realized in a laterally diffused MOS transistor by fabricating the transistor in a P-doped epitaxial layer on an N-doped semiconductor substrate and using a trench contact for ohmically connecting the N-doped source region to the N-doped substrate.

REFERENCES:
patent: 5869875 (1999-02-01), Hebert
patent: 6864533 (2005-03-01), Yasuhara et al.

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