Lateral type field effect transistor

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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Details

257341, 257401, H01L 2976, H01L 2994, H01L 31062

Patent

active

055023231

ABSTRACT:
To widen the width of under layer wiring connected to a source region and to lower the resistance of the under layer wiring in a semiconductor device, a direction connecting a through hole with a contact hole connected to a drain region is tilted by 45 or by 30 over a direction connecting between contact holes for connecting a source region or the drain region. Alternatively, the source region and the a drain region are respectively aligned in parallel stripes, and the through hole and the contact hole for connecting the drain region are aligned in a stripe in which the drain region is aligned.

REFERENCES:
patent: 5355008 (1994-10-01), Moyer et al.
"High-Efficiency Complementary Power Mos PWM Driver LSI with Low-Loss Full-Mode Snsing" by Kozo Sakamoto et al. IEEE 1992 Custom Integrated Circuits Conference, pp. 25.7.1-25.7.4.

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