Lateral semiconductor device

Details Lateral semiconductor device Lateral semiconductor device

2008-01-29

2008-01-29

Pert, Evan (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S288000, C257S347000, C257SE29152

Reexamination Certificate

active

07323747

ABSTRACT:
In a high voltage P-channel MOS transistor formed on a silicon-on-insulator (SOI) substrate, a P+-type source region (8), an N-type body region (4) and an N+-body contact diffusion region (10) are surrounded by a P+-type drain region (9) and a P-type drift region (5). A gate electrode (7) is formed to overlap the end portion of the N-type body region (4). The end portion of the N-type body region (4) has a portion in which the gate electrode (7) and the P+-type source region (8) are not adjacent to each other.

REFERENCES:
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patent: 5723895 (1998-03-01), Takahashi
patent: 6441432 (2002-08-01), Sumida
patent: 6724041 (2004-04-01), Rumennik et al.
patent: 6982461 (2006-01-01), Hossain et al.
patent: 7002211 (2006-02-01), Onishi et al.
patent: 2002/0050619 (2002-05-01), Kawaguchi et al.
patent: 2000-156495 (2000-06-01), None

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