Lateral PNP transistor using a latch voltage of NPN transistor

Details Lateral PNP transistor using a latch voltage of NPN transistor Lateral PNP transistor using a latch voltage of NPN transistor

1992-04-01

1993-08-17

Prenty, Mark V.

Active solid-state devices (e.g., transistors, solid-state diode

Integrated circuit structure with electrically isolated...

Lateral bipolar transistor structure

257575, 257577, H01L 2972

Patent

active

052371980

ABSTRACT:
A lateral PNP transistor having either of the collector or the emitter diffusion layers layered with an n.sup.+ type diffusion layer, is shown. The added layer serves to increase the static electricity withstand stress along a transistor discharging path. A low withstand stress contributes to transistor damage at high breakdown voltages. When an n.sup.+ diffusion layer is formed within a diffusion layer in a lateral PNP transistor the transistor behaves as a combination of two transistors, PNP and NPN, selectively configured.

REFERENCES:
patent: 4489341 (1984-12-01), Mayrand
patent: 4542399 (1985-09-01), Monticelli
patent: 4558286 (1985-12-01), Neidorff
patent: 4886982 (1989-12-01), Villa et al.
patent: 4901132 (1990-02-01), Kuwano
patent: 4935375 (1990-06-01), Kasper et al.
patent: 4979008 (1990-12-01), Siligoni et al.
IBM Technical Disclosure Bulletin, vol. 27, #11, pp. 6490-6491 Apr. 1985.

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