Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
1999-08-19
2001-09-18
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S637000, C438S639000
Reexamination Certificate
active
06291353
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to the formation of self-aligned structures in integrated circuit devices and more particularly to generating a lateral mask followed by lateral etching, deposition, diffusion or epitaxy.
2. Description of the Related Art
Spacers are broadly used in the conventional formation of integrated circuit devices. The spacers are self-aligned structures generated laterally adjacent to an existing structure. The spacers can be used as a mask for vertical processing (e.g., as etch masks or implant masks).
However, conventional processing is limited to the formation of vertical features/structures self-aligned with the spacers. This limits the designers ability to form structures laterally. The invention overcomes this problem as discussed below.
SUMMARY OF THE INVENTION
It is, therefore, an object of the present invention to provide a structure and method for forming an integrated circuit chip having at least one opening in a substrate which includes forming an opening having vertical walls in the substrate, protecting a first portion of the vertical walls of the opening, leaving a second portion of the vertical walls unprotected, and laterally processing the second portion of the opening to change the shape of the opening. The laterally processing can include an isotropic wet etch, an isotropic dry etch or an anisotropic wet etch, selective deposition processes, selective epitaxial processes, or diffusion. The protecting includes forming a mask over the first portion of the vertical walls. The first portion can be the upper or lower portion of the opening. The first portion and the second portion can be alternating portions along a depth of the opening.
A second embodiment of the invention is a structure and method of forming an integrated circuit chip having at least one opening in a substrate which includes forming an opening having vertical walls in the substrate, protecting a first portion of the vertical walls of the opening, leaving a second portion of the vertical walls unprotected, and laterally patterning the second portion of the opening to form a step in the opening.
A third embodiment of the invention is a method of forming an integrated circuit chip having at least one transistor which includes forming an opening having vertical walls in a semiconductor substrate, protecting a first portion of the vertical walls of the opening, leaving a second portion of the vertical walls unprotected, laterally patterning the second portion of the opening to form a step in the opening, and doping selected portions of the step to form two conductive regions separated by a semiconductive region. In the presence of an adjacent voltage field, the semiconductive region changes its conductivity and performs a switching operation in combination with the conductive regions.
Yet another embodiment of the invention is a method of forming an integrated circuit chip having at least one opening in a substrate which includes forming an opening having vertical walls in the substrate, protecting first portions of the vertical walls of the opening, leaving second portions of the vertical walls unprotected, wherein the first portions alternate with the second portions, and laterally etching the second portions of the opening to change a shape or property of the opening.
A further embodiment is an integrated circuit having at least one trench capacitor where the trench capacitor includes an opening having vertical sides, the vertical sides including a plurality of lateral openings, an insulator lining the opening and a conductor filling the opening. The lateral openings can be rectangular, v-shaped or curved openings in cross-section. The lateral openings increase a surface area and capacitance of the trench capacitor.
The invention is superior to conventional formation techniques because it allows for self-aligned patterning in the third dimension (i.e., laterally). Also, the size of the structures can be easily adjusted by altering of the depth of the sacrificial and/or mask material, as discussed above. The depositions of the masking and sacrificial materials can be controlled much more precisely with the invention than with conventional lithographic techniques. This is especially true when the dimensions of the structures decrease.
REFERENCES:
patent: 4690729 (1987-09-01), Douglas
patent: 5369053 (1994-11-01), Fang
patent: 6054384 (2000-11-01), Wang et al.
patent: 337039 (1998-07-01), None
Muller K. Paul
Wong Hon-Sum P.
Bowers Charles
Huynh Yennhu B.
International Business Machines - Corporation
McGinn & Gibb PLLC
Underweiser, Esq. Marian
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