Lateral etch inhibited multiple for forming a via through a micr

Details Lateral etch inhibited multiple for forming a via through a micr Lateral etch inhibited multiple for forming a via through a micr

1997-12-29

1999-03-30

Powell, William

Cleaning and liquid contact with solids

Processes

Including application of electrical radiant or wave energy...

134 13, 438704, 438723, 438718, 438725, 438734, B08B 600, H01L 21302

Patent

active

058883096

ABSTRACT:
A method for forming within a microelectronics fabrication a via through a microelectronics layer formed of a material susceptible to sequential etching employing a fluorine containing plasma etch method followed by an oxygen containing plasma etch method. There is first provided a substrate employed within a microelectronics fabrication. There is then formed over the substrate a microelectronics layer formed of a material susceptible to sequential etching employing a fluorine containing plasma etch method followed by an oxygen containing plasma etch method. There is then formed upon the microelectronics layer a patterned photoresist layer. There is then etched through use of the fluorine containing plasma etch method while employing the patterned photoresist layer as a photoresist etch mask layer the microelectronics layer to form a patterned microelectronics layer having a via formed through the patterned microelectronics layer. The fluorine containing plasma etch method employing a fluorine containing etchant gas composition which simultaneously forms a fluorocarbon polymer residue layer upon a sidewall of the via. There is then stripped through use of the oxygen containing plasma etch method the patterned photoresist layer from the patterned microelectronics layer while leaving remaining a no greater than partially etched fluorocarbon polymer residue layer upon the sidewall of the via. Finally, there is then stripped through use of a wet chemical stripping method the no greater than partially etched fluorocarbon polymer residue layer from the sidewall of the via.

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"Characterization of Functional Probe Failure of 0.8 Micron CMOS Devices"; Wu et. al.; Proc.-Elect. Soc. (1994), 94-20 pp. 410-420.
"Integration of Low K Organic Flowable SOG in a Non-Etchback/CMP Process"; Chen et. al.; S.P.I.E., vol. 3214, pp. 86-93, Oct. 1997.
"Application of Microwave Downstream Plasma For Cleaning: Post Via--Etch Residue Removal"; Deshmukh et. al.; 1996; Proc.-Electrochem. Soc. (1996); abstract only.

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