Lateral DMOS structure with lateral extension structure for...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S339000, C257S342000

Reexamination Certificate

active

06894349

ABSTRACT:
A high voltage lateral semiconductor device for integrated circuits with improved breakdown voltage. The semiconductor device comprising a semiconductor body, an extended drain region formed in the semiconductor body, source and drain pockets, a top gate forming a pn junction with the extended drain region, an insulating layer on a surface of the semiconductor body and a gate formed on the insulating layer. In addition, a higher-doped pocket of semiconductor material is formed within the top gate region that has a higher integrated doping than the rest of the top gate region. This higher-doped pocket of semiconductor material does not totally deplete during device operation. Moreover, the gate controls, by field-effect, a flow of current through a channel formed laterally between the source pocket and a nearest point of the extended drain region.

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patent: 5138177 (1992-08-01), Morgan et al.
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patent: 5763927 (1998-06-01), Koishikawa
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patent: 0 115 098 (1984-08-01), None
patent: 401238062 (1989-09-01), None
patent: 404107870 (1992-04-01), None
Nezer et al., Optimization of the Breakdown Voltage in LDMOS Transistors Using Internal Field Rings, 1991, IEEE, CH2987, pp. 149-153.

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