Lateral bipolar transistor with additional ESD implant

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S575000

Reexamination Certificate

active

07875933

ABSTRACT:
A semiconductor device (10) includes a semiconductor body (12) of a first conductivity type (e.g., p-type). A first doped region (14) of a second conductivity type (e.g., n-type) is disposed at an upper surface of the semiconductor body (12). A second doped region (16) of the second conductivity type is disposed at the upper surface of the semiconductor body (12) and is separated from the first doped region (14) by an isolation region (18). A first contact (26) overlies and is electrically coupled to the first doped region (14) and a second contact (28) overlies and is electrically coupled to the second doped region (16). A third doped region (32) of the first conductivity type is disposed within the semiconductor body (12) beneath the first doped region (14).

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Bock, K., et al, “Influence of well profile and gate length on the ESD performance of a fully silicided 0.25μm CMOS technology,” EOS/ESD Symposium, Sep. 23-25, 1997, pp. 308-315.

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