Latch type sense amplifier method and apparatus

Details Latch type sense amplifier method and apparatus Latch type sense amplifier method and apparatus

2005-05-24

2005-05-24

Tran, M. (Department: 2818)

Static information storage and retrieval

Read/write circuit

Flip-flop used for sensing

C365S185170

Reexamination Certificate

active

06898135

ABSTRACT:
Disclosed is an apparatus for and a method of overcoming signal delay problems in a read-out path occurring in connection with pipelined memory circuits. A latch type sense amplifier (SA) is used to receive the memory cell logic levels during a pre-charge state in a cycle prior to read-out. Thus, the SA may quickly provide an output signal during a read latch clock cycle. The SA output is passed through a dynamically enabled logic circuit to a latch circuit for holding the receiving logic value for use in the next clock cycle.

REFERENCES:
patent: 3969706 (1976-07-01), Proebsting et al.
patent: 4894803 (1990-01-01), Aizaki

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