Laser anneal method of a semiconductor layer

Details Laser anneal method of a semiconductor layer Laser anneal method of a semiconductor layer

1997-08-14

2001-08-14

Wilczewski, Mary (Department: 2822)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

C438S487000, C438S166000

Reexamination Certificate

active

06274414

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device, particularly to a method for manufacturing an LCD (liquid crystal display) such as a driver circuit integrated type LCD in which TFTs (thin film transistors) comprising a polycrystal semiconductor layer are formed in a display area and a driver area.
2. Description of the Related Art
In recent years, LCDs have been regularly employed in OA and AV apparatuses because of advantages resulting from their small size and thickness and their low power consumption. Active matrix type displays, in which each pixel is equipped with a TFT as a switching device for controlling the rewrite timing of image data, are especially able to display moving pictures with high resolution on a large screen, and are therefore used for displays in various televisions, personal computers, and the like.
A TFT is an FET (field effect transistor) obtained by forming a semiconductor layer together with a metal layer in a predetermined shape on an insulating substrate. In an active matrix type LCD, each TFT is connected to an electrode of each pixel capacitor formed between a pair of substrates, for driving liquid crystal.
In particular, developments have been made to LCDs using polycrystal silicon (p-Si) as a semiconductor layer in place of amorphous silicon (a-Si) which has previously been common, and annealing with use of a laser beam has been put to use for formation or growth of crystal grains of p-Si. In general, p-Si has a higher mobility than a-Si so that using p-Si to form a TFT can downsize TFTs, allowing a high aperture ratio and a high resolution to be realized. In addition, since TFTs can be constructed in a gate self-alignment structure, fine TFT elements can achieve higher speed operation by reductions in parasitic capacity. By using these TFTs to form an electric complementary connection structure between an n-ch TFT and a p-ch TFT, i.e., a CMOS, a higher speed driver circuit can be constructed. Therefore, a driver circuit section can be formed to be integrated with a display pixel section on one substrate, allowing manufacturing costs to be reduced and realizing a small size LCD module.
Known methods of forming a p-Si layer on an insulating substrate include a crystallization method under a high temperature, by annealing a-Si formed under a low temperature, a solid phase crystallization method under a high temperature, and the like. In all known methods, some treatment must be carried out under a high temperature of 900° C. or more. Therefore, it is not possible to use a low cost non-alkaline glass substrate as an insulating substrate in view of heat resistance and, as quartz glass substrate is required, a higher manufacturing cost results. In contrast, developments have been made to a method which allows use of a non-alkaline glass substrate as an insulating substrate by performing silicon polycrystallization processing at a relatively low substrate temperature of 600° C. or less, through use of laser annealing. Such processes, in which the processing temperature is 600° C. or less throughout all TFT manufacturing steps are called “low-temperature processes”, and are essential for mass-production of low cost LCDs.
FIG. 1
shows a state of a substrate to be processed by excimer laser annealing (hereinafter referred to as “ELA”). A substrate
1
to be processed is a popular non-alkaline glass substrate. An a-Si layer is formed on the surface of the substrate
1
. An active matrix substrate
5
is a substrate for constructing an LCD comprising a display area
2
where display pixels are arranged in matrix, and a gate driver
3
and a drain driver
4
provided surrounding the display area
2
. The substrate
1
is a mother glass substrate including a plurality of active matrix substrates
5
. In the display area
2
, pixel electrodes, each being an electrode of a pixel capacitor for driving liquid crystal, are formed and arranged in matrix, and are respectively connected with TFTs formed. The gate driver
3
is mainly constructed by a shift register, and the drain driver
4
is mainly constructed by a shift register and a sampling circuit. These drivers are formed by a TFT array such as a CMOS or the like.
Each of TFTs is formed such that, as shown in
FIG. 2
, a p-Si layer obtained by crystallization of an a-Si layer by use of the ELA method is used as an active layer. In the area where a p-Si layer
11
etched into an island-like shape is formed, a non-doped channel region CH, light-doped regions LD, and heavy-doped source and drain regions S, D are arranged. On the channel region CH, a gate electrode
13
is arranged with a gate insulating film interposed between the channel region and the gate electrode
13
. A source electrode and a drain electrode are connected to the source and the drain regions respectively. In the driver circuit areas, a TFT is connected to form a CMOS or the like. In a display area, a signal line and a pixel electrode are connected to the respective drain electrode and the source electrode.
As shown in
FIG. 1
, in a conventional laser annealing method, a line beam is irradiated on a substrate
1
such that the contour of edge lines C of a band-like irradiated region of a line beam irradiated on the substrate
1
is shifted by a predetermined overlap amount. Scanning is carried out as indicated by the arrow in the drawing, and the entire substrate is subjected to annealing. However, after scanning is thus performed with a line beam, there remains a defective crystallization region in which sufficient crystallization was not attained and grains with a smaller grain size, as indicated by reference R in the figure, remain in p-Si formed. This region is formed in a fine liner shape along the longitudinal direction of the irradiated region, and appears in a striped pattern. Since this defective crystallization region R has a low mobility and a high resistance, the characteristics of TFTs formed in this region are degraded. If the characteristics of TFTs are thus degraded, pixel capacitors are not sufficiently charged in the display area so that the contrast ratio is lowered, or erroneous operation is caused in the driver circuit area, thus disadvantageously influencing display.
It is estimated that a defective crystallization region as described above is caused because of unevenness in energy of an irradiated laser beam. Laser annealing strongly depends on the energy of the irradiated laser beam. In general, the grain size of crystal tends to increase as the irradiation energy increases. However, when the energy level increases to a certain level Eu or more, the grain size rapidly decreases to the microcrystal level. Hence, it is demanded that the energy level of a laser beam to be irradiated onto an a-Si layer should be as large as possible within a range of Eu to Ed which is lower than an upper limit level Eu such that the energy level does not exceed the upper limit Eu, in order to enlarge the grain size as much as possible thereby to achieve TFTs having excellent characteristics.
FIG. 3
shows an energy distribution of an irradiation beam with respect to positions in a line beam. An optical system for generating a line beam is provided with a line width adjust slit and a line length adjust slit, to form a line beam of a band-like or rectangular shape. Thus, since the line width A of the line beam is defined by the line width adjust slit, the characteristic curve of the irradiation light intensity distribution has substantially sharp edges and a substantially flat energy distribution peak portion Eo, as shown in FIG.
3
. However, in regions X and B in
FIG. 3
, the energy level is extremely high or low and is thus greatly differs from the level at the flat portion.
In an optical system comprising a plurality of lenses, light is diffracted or interfered due to slight concave and convex portions existing in the lens surfaces or foreign material contamination or the like adhering thereto. The light thus diffracted or interfered is conv

Affiliated with

Also associated with

Rating

Laser anneal method of a semiconductor layer does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Laser anneal method of a semiconductor layer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Laser anneal method of a semiconductor layer will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2496080