Semiconductor device manufacturing: process – Making device array and selectively interconnecting
Reexamination Certificate
2011-08-30
2011-08-30
Potter, Roy K (Department: 2822)
Semiconductor device manufacturing: process
Making device array and selectively interconnecting
C438S639000, C257SE23010
Reexamination Certificate
active
08008134
ABSTRACT:
An electronic package and methods by which the package reduces thermal fatigue failure of conductors in the electronic package. The electronic package includes a carrier substrate having first and second surfaces and a plurality of anchor vias having a via material extending from the first surface toward the second surface. The electronic package includes a first conducting layer having a length and a width extending laterally in two dimensions across a major part of the first surface of the carrier substrate. The anchor vias have plural attachments along the length and the width of the first conducting layer to secure the first conducting layer to the carrier substrate.
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Imperium Patent Works
Potter Roy K
Research Triangle Institute
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