Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
1999-02-26
2002-04-02
Auve, Glenn A. (Department: 2181)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C713S323000
Reexamination Certificate
active
06366975
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a large-scale integrated circuit (LSI), and more particularly to a circuit for controlling LSI and an electronic device, including an internal circuit capable of swiftly switching systems operating under different modes.
2. Description of the Related Art
When systems having different modes are to be alternately operated by means of a conventional circuit for controlling an electronic device including LSIs having the same structure, it is necessary to initialize LSIs each time a system is switched to another.
FIGS. 1
is a circuit diagram of a conventional circuit for controlling an electronic device including LSIs. The illustrated circuit is comprised of a central processing unit (CPU)
704
, a memory
705
, a plurality of LSIs
701
i
(i=a,b, - - - ), a bus
702
electrically connecting CPU
704
and the memory
705
to LSIs
701
i.
Each of LSIs
701
i is comprised of a register
706
i
(i=a,b, - - - ) connected to the bus
702
, a peripheral functional block
703
i
(i=a,b, - - - ), and a communicator
710
i
(i=a,b, - - - ) electrically connected to the register
706
i
the bus
702
, and the peripheral functional block
703
i.
The memory
705
stores initial values necessary for carrying out each mode. When CPU
704
receives a signal requesting a mode to be switched, CPU
704
transfers an initial value necessary for carrying out a requested mode to the registers
706
i from the memory
705
. Further, CPU
704
transmits a command signal to the peripheral functional blocks
703
i
through the communicators
710
i
to thereby cause the peripheral functional blocks
703
i
to carry out the requested mode.
However, the conventional circuit illustrated in
FIG. 1
is accompanied with the following problems:
(a) a content of each of the registers
706
is eliminated each time when a mode is switched;
(b) it is necessary to make access to the memory
705
for reading out the initial values each time when a mode is to be switched;
(c) it is also necessary to control the bus
702
for reading out the initial values;
(d) a software has to bear a load for controlling the bus
702
; and
(e) it would take much time for switching a mode because of the abovementioned matters.
For instance, Japanese Unexamined Patent Publication No. 6-168180 having been published for public inspection on Jun. 14, 1994 has suggested a semiconductor integrated circuit including a register and being capable of operating in a plurality of modes. The semiconductor integrated circuit is designed to transfer from a first mode to a second mode when predetermined data is set in the register. In an embodiment, the semiconductor integrated circuit is designed to include a plurality of registers, wherein predetermined data is set in a certain register, only the register is reset.
The suggested semiconductor integrated circuit is also accompanied with the above-mentioned problems.
SUMMARY OF THE INVENTION
In view of the above-mentioned problems in the conventional circuit, it is an object of the present invention to provide a circuit for controlling an electronic device, which circuit is not required to initialize registers when a mode is to be switched, and thereby can shorten a period of time necessary for switching a mode. It is also an object of the present invention to provide a method of controlling the above-mentioned circuit.
In one aspect of the invention, there is provided an integrated circuit electrically connected to both a central processing unit and a memory, for controlling an electronic device, the integrated circuit including (a) a peripheral functional block operating under an operation mode the central processing unit indicated, (b) a communicator for communicating an internal signal to the peripheral functional block, (c) at least two registers capable of being initialized with a desired initial value stored in the memory in accordance with indications from the central processing unit, and (d) a switch receiving an external signal to select one of the registers, a signal being transmitted to the communicator through the thus selected register.
The number of the registers may be set equal to two or three.
There is further provided a circuit for controlling an electronic device, including (a) a central processing unit, (b) a memory storing initial values each associated with each of operation modes, (c) at least one integrated circuit, (d) a detecting circuit for detecting an external mode-switching signal, an operation mode under which the integrated circuit operates being switched by the external mode-switching signal, and (e) a bus electrically connecting the central processing unit to the integrated circuit and the detecting circuit, the integrated circuit including (c
1
) a peripheral functional block operating under an operation mode the central processing unit indicated, (c
2
) a communicator for communicating an internal signal to the peripheral functional block, (c
3
) at least two registers capable of being initialized with a desired initial value stored in the memory in accordance with indications from the central processing unit, and (c
4
) a switch receiving a selection signal transmitted from the detecting circuit to thereby select one of the registers, a signal being transmitted to the communicator through the thus selected register.
It is preferable that the circuit may further include a recording medium storing therein a program for operating the circuit.
It is preferable that the circuit may further include a signal circuit positioned between the central processing unit and the detecting circuit for keeping the switch inactive even if the switch receives the selection signal transmitted from the detecting circuit. As an alternative, the circuit may further include a signal line electrically connecting the central processing unit to the detecting circuit, the detecting circuit receiving the external mode-switching signal when a signal transmitted from the central processing unit to the detecting circuit through the signal line has a first level, whereas the detecting circuit not receiving the external mode-switching signal when a signal transmitted from the central processing unit to the detecting circuit through the signal line has a second level.
In another aspect of the invention, there is provided a method of controlling a circuit to be used for controlling an electronic device, the circuit including a central processing unit, and at least one integrated circuit electrically connected to the central processing unit, the integrated circuit including at least two registers, a peripheral functional block operating under an operation mode the central processing unit indicated, and a communicator for communicating an internal signal to the peripheral functional block, the method including the steps of (a) initializing each of the registers into a desired mode, (b) selecting one of the registers in accordance with an external mode-switching signal, a signal being transmitted to the communicator through the thus selected register, (c) operating the peripheral functional block under a mode associated with the mode-switching signal, (d) when the mode-switching signal is switched to a new mode-switching signal, switching a register among the registers in accordance with the new mode-switching signal, and (e) operating the peripheral functional block under a mode associated with the new mode-switching signal.
It is preferable that the method further includes the step of keeping the steps (d) and (e) away from being carried out. As an alternative, the method may further include the steps (d) and (e) are carried out when the central processing unit transmits a signal having a first level, and the steps (d) and (e) are not carried out when the central processing unit transmits a signal having a second level.
In still another aspect of the invention, there is provided a recording medium readable by a computer, storing a program therein for causing a computer to act as the above-ment
Auve Glenn A.
Scully Scott Murphy & Presser
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