Large capacity memory circuit with improved write control circui

Static information storage and retrieval – Read/write circuit – For complementary information

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Details

365203, 365205, G11C 1140

Patent

active

045596190

ABSTRACT:
A memory circuit which can operate with low power consumption. First and second bit lines are coupled to first and second input nodes of a sense amplifier through first and second transistors, respectively. The first transistor is disenabled with the second transistor enabled when a write data signal is applied to the second bit line. After the state of the sense amplifier is determined by the write data signal, the level of the first bit line is determined by the write data signal, the level of the first bit line is determined by the sense amplifier by the enabled first transistor.

REFERENCES:
patent: 4081701 (1978-03-01), White, Jr. et al.
patent: 4138740 (1979-02-01), Itoh
patent: 4366559 (1982-12-01), Misaizu et al.

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