Large area silicon carbide devices and manufacturing methods...

Details Large area silicon carbide devices and manufacturing methods... Large area silicon carbide devices and manufacturing methods...

2001-10-17

2003-02-04

Pham, Long (Department: 2823)

Semiconductor device manufacturing: process

With measuring or testing

Electrical characteristic sensed

C438S014000, C438S015000, C438S105000, C438S133000, C438S197000, C438S309000

Reexamination Certificate

active

06514779

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to microelectronic devices and fabrication methods therefor, and more particularly to silicon carbide devices and manufacturing methods therefor.
BACKGROUND OF THE INVENTION
Silicon carbide (SiC) has been known for many years to have excellent physical and electronic properties which should theoretically allow production of electronic devices that can operate at higher temperatures, higher power and higher frequency than devices produced from silicon (Si) or GaAs. The high electric breakdown field of about 4×10
6
V/cm, high saturated electron drift velocity of about 2.0×10
7
cm/sec and high thermal conductivity of about 4.9 W/cm-°K indicate that SiC would be suitable for high frequency, high power applications. Unfortunately, difficulty in manufacturing has limited the usefulness of SiC for high power and high frequency applications.
Many different types of silicon carbide devices which may be suitable for differing high power applications have been described, including diodes, MOSFETs, MESFETs, JFETs and the like. See e.g. U.S. Patent Nos. 5,061,972, 5,264,713, 5,270,554, 5,506,421, 5,539,271, 5,686,737, 5,719,409, 5,831,288, 5,969,378, 6,011,279 and 6,121,633, the disclosures of which are incorporated herein by reference as if set forth fully herein. These devices may take advantage of the characteristics of silicon carbide to provide high power handling capabilities. While such silicon carbide devices may provide improved power handling capabilities over comparably sized silicon devices, it may be difficult to create large scale devices in silicon carbide. For example, in silicon a single device may be made on a wafer such that the device is substantially the same size as the wafer. However, manufacturing defect free silicon carbide wafers may be difficult, if not impossible. Thus, a device which consumes an entire wafer may have defects incorporated into the device which may limit its performance.
For example, large area SiC power switches and/or diodes with a typical rating of 600V, 50-100 A are desired in many electric motor drive applications. However, as described above, it may not be practical to make SiC switches and/or diodes of the required rating in a single die. For example, at 100 A/cm
2
, an active area of 7 mm×7 mm may be needed for a 50 A device. The device yield is typically limited by micropipe density as well as other defects such as dislocations, carrots, silicon inclusions, and processing defects etc. As illustrated in
FIG. 1
, assuming an all inclusive defect density of 20 cm
−2
, the projected yield for a 2 mm×2 mm (4 A) die is ~50%. As is further illustrated in
FIG. 1
, the yield drops to less than 20% for a 3.3 mm×3.3 mm (10 A) die with the same overall defect density. The 50 A die will have a yield of ~1%.
One conventional technique for obtaining higher yields of larger area devices is to selectively place devices in defect free sites or Micropipe Free Areas (MFA). Such identified sites are illustrated in FIG.
2
. The MFA approach typically requires a separate mask set for each wafer and may be extremely tedious in terms of requiring custom maps for each wafer. In addition, the MFA approach considers micropipes as the only defect which is to be avoided, however, failure of a device may also be due to other defects. Accordingly, use of the MFA approach may not guarantee high yield.
Even with the rapid advancements in the materials technology, it is anticipated that it will still take a significantly long time to achieve cost-effective manufacturing of 50 to 100 A devices in a single die, using techniques described above.
SUMMARY OF THE INVENTION
Embodiments of the present invention provide silicon carbide devices and methods of fabricating silicon carbide devices by combining a plurality of a same type of silicon carbide devices on at least a portion of a silicon carbide wafer which are fabricated in a predefined pattern and utilizing a stepper mask to selectively interconnect those devices which pass an electrical test. The same stepper mask may be utilized for each of the plurality of silicon carbide devices such that devices. Thus, in particular embodiments of the present invention a stepper mask corresponding to one of the plurality of silicon carbide devices is selectively applied to ones of the plurality of silicon carbide diodes which are identified as having passed an electrical test. The stepper mask is applied for each of the identified silicon carbide devices.
In further embodiments of the present invention, the silicon carbide devices have first contacts on a first face of the silicon carbide wafer. The first contacts are selectively interconnected by forming a passivation layer on the silicon carbide devices which covers the first contacts, selectively forming openings in the passivation layer corresponding to first contacts for the identified ones of the plurality of silicon carbide devices and electrically connecting the first contacts through the selectively formed openings utilizing the stepper mask to open vias through the passivation layer.
In additional embodiments of the present invention, a device size is selected to provide an expected yield of devices in silicon carbide such that a sufficient number of devices in a region of the silicon carbide wafer containing a plurality of silicon carbide devices will pass the electrical test so as to provide a silicon carbide device having a selected operating capability. In such embodiments, the plurality of the same type of silicon carbide devices are formed to provide silicon carbide devices of the selected device size.
In still further embodiments of the present invention, the silicon carbide devices are vertical silicon carbide diodes. In such a case, the silicon carbide diodes have a commonly connected second contact. Furthermore, electrically testing the silicon carbide devices may be provided by electrically testing the reverse bias blocking voltage of the silicon carbide diodes to determine if the reverse bias blocking voltage of a silicon carbide diode exceeds a predefined voltage value.
In particular embodiments of the present invention, the plurality of silicon carbide devices are provided in a plurality of dies on the silicon carbide wafer. In such embodiments, the silicon carbide wafer may be diced to provide a plurality of chips. The chips would then have a plurality of selectively interconnected silicon carbide devices.
In other embodiments of the present invention, the plurality of silicon carbide devices are distributed across the silicon carbide wafer. In such embodiments, selectively interconnecting the devices may be provided by selectively interconnecting a sufficient number of the silicon carbide devices to provide a desired operating characteristic utilizing an overlay pad. The size of the overlay pad may be selected based on the desired operating characteristic and the number of the silicon carbide devices required to produce a silicon carbide device having the desired operating characteristic.
In still further embodiments of the present invention, the silicon carbide devices have a second contact on the first face of the silicon carbide wafer. In such a case, the second contacts of the identified ones of the silicon carbide devices may also be selectively interconnected. Furthermore, where the silicon carbide devices are vertical silicon carbide devices having a third contact on a second face of the silicon carbide wafer opposite the first face, the third contacts of the silicon carbide devices may also be connected in parallel. Such an interconnection of the third contacts may be provided by commonly connecting the third contacts of each of the silicon carbide devices.
In additional embodiments of the present invention, selectively interconnecting the first contact and selectively interconnecting second contacts is provided by forming a passivation layer on the silicon carbide devices which covers the first contacts, selectively forming openings in the passivation layer corres

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