Large area P-N junction devices formed from porous silicon

Details Large area P-N junction devices formed from porous silicon Large area P-N junction devices formed from porous silicon

1993-12-16

1994-12-27

Jackson, Jerome

Active solid-state devices (e.g., transistors, solid-state diode

Responsive to non-electrical signal

Physical deformation

257618, 257619, H01L 2984, H01L 2996

Patent

active

053768183

ABSTRACT:
Stress sensitive P-N junction devices are fabricated by forming a porous layer in a semiconductor of a given conductivity, diffusing dopants of the opposite conductivity into the porous layer and forming a non-porous layer on the porous layer. This results in a microporous structure having a plurality of microcrystalline regions extending therethrough, which enhances the quantum confinement of energetic carriers and results in a device which is highly sensitive to stress.

REFERENCES:
patent: 3995247 (1976-11-01), Kurtz
patent: 4204185 (1980-05-01), Kurtz et al.
patent: 5298767 (1994-03-01), Shor et al.
Smith et al. "Porous silicon formation mechanism", Journal of Applied Physics, vol. 71 No. 8 R1 pp. R1-R22 1992.

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