Lane to lane deskewing via non-data symbol processing for a...

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C710S008000, C710S052000

Reexamination Certificate

active

07913001

ABSTRACT:
Multiple symbol sequences that have been transmitted in parallel using the same transmit clock over a serial point to point link are received. Each symbol sequence includes an instance of a first, non-data symbol. The multiple symbol sequences are buffered and the number of times an instance of a second, non-data symbol that occurs in one of the symbol sequences is changed. A first deskew process is performed, followed by a second deskew process. The first deskew process aligns an instance of the first non-data symbol in every one of the buffered symbol sequences. The second deskew process equalizes the number of instances of the second non-data symbol that follow an instance of the first non-data symbol in every one of the symbol sequences. Other embodiments are also described and claimed.

REFERENCES:
patent: 6009488 (1999-12-01), Kavipurapu
patent: 6625675 (2003-09-01), Mann
patent: 6654824 (2003-11-01), Vila et al.
patent: 7295639 (2007-11-01), Cory
patent: 2002/0112099 (2002-08-01), Collier
patent: 2002/0138675 (2002-09-01), Mann
patent: 2003/0099260 (2003-05-01), Bunton
patent: 2003/0112827 (2003-06-01), Cox et al.
patent: 2005/0005051 (2005-01-01), Tseng
PCT International Search Report (dated May 18, 2005), International Application No. PCT/US2004/043526—International Filing Date Dec. 22, 2004, 12 pages.
PCT International Preliminary Report on Patentability (dated Jul. 13, 2006), International Application No. PCT/US2004/043526—International Filing Date Dec. 22, 2004, 8 pages.
“PCI Express (TM) Base Specification Revision 1.0a”, Apr. 15, 2003 (Incorporated Errata C1-C67 and E1-E4.17) PCI Express (Contents, pp. 3-8; and Chapter 4-4. Physical Layer Specification, pp. 151-201).
Budruk, Ravi, et al., “PCI Express System Archtiecture”,PC System Architecture Series, MindShare, Inc., Addison-Wesley copyright 2004, ISBN #0-3212-15630-7(Contents, pp. vii-xxxvii; Part Three The Physical Layer—Chapter 11 Physical Layer Logic, pp. 397-451; and Lonk Initialization and Training Overview, pp. 500-552.
INTEL,Non-Final Office Action(dated Dec. 11, 2008),U.S. Appl. No. 10/749,721, Filed Dec. 31, 2003, 21 pages.
Intel Corporation, Office Action from German Patent Office dated Jul. 2, 2010, German Application No. 11 2004 002 567.2.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Lane to lane deskewing via non-data symbol processing for a... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Lane to lane deskewing via non-data symbol processing for a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Lane to lane deskewing via non-data symbol processing for a... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2644638

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.