Electric heating – Heating devices – With power supply and voltage or current regulation or...
Reexamination Certificate
2000-11-22
2002-10-22
Paschall, Mark (Department: 3742)
Electric heating
Heating devices
With power supply and voltage or current regulation or...
C219S497000, C392S416000
Reexamination Certificate
active
06469284
ABSTRACT:
BACKGROUND OF THE INVENTION
(a) Field of the Invention
The present invention relates to a lamp annealer for use in a semiconductor fabrication process and a method for controlling the processing temperature thereof.
(b) Description of the Related Art
Conventionally, the characteristics of MOS transistors have been controlled by adjusting the amount of impurities injected under the gate insulator film. On the other hand, along with the development of finer patterning of the semiconductor device, the allowable margin in each manufacturing step has been reduced. Especially, the transistor characteristic, such as the threshold voltage of the MOS transistor, greatly depends on the shape of the vicinity of the gate electrode, the dimension of the gate length, and the thickness of the side-wall film formed on the gate electrode. In this respect, the control of the transistor characteristic is generally impossible after the gate electrode is formed in the conventional technique.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a lamp annealer and a method for controlling the processing temperature of the lamp annealer, wherein one or more of the transistor characteristics of the final product can be adjusted by changing the processing conditions effected by the lamp annealer system.
The present invention provides a lamp annealer system including a processing chamber for receiving therein a wafer, a lamp block including a plurality of zone segments each capable of heating a corresponding portion of the wafer at an output power independent of the output power of the other zone segments, a plurality of thermometers each for measuring a temperature of a corresponding portion of the wafer, and a control section for controlling an output power of each of said zone segments of said lamp block based on the temperature measured by a corresponding one of the thermometers.
In accordance with the lamp annealer system of the present invention, the lamp block, including a plurality of zone segments, which are capable of being controlled for the output power thereof independently of each other, enables the in-plane fluctuations of a transistor characteristic on the wafer surface to be reduced, by controlling the temperature of each of the zone segments of the lamp block.
The present invention also provides a method for fabricating a semiconductor device including the steps of measuring a value of an item of a processing condition for a wafer in each of specified work steps, the item affecting a transistor characteristic of a final product obtained from the wafer, calculating a fluctuation in the transistor characteristic caused by the value of the item, adding the calculated fluctuations together in the specified work steps prior to an annealing step to calculate a total fluctuation, annealing the wafer while controlling a processing temperature based on the total fluctuation and a numerical expression showing a relationship between the processing temperature and the transistor characteristic.
In accordance with the method of the present invention, the fluctuations (or variations) of the transistor characteristic, such as the threshold voltage, break down voltage, and operational speed of a MOS transistor, can be reduced by controlling the annealing temperature during the lamp annealing step.
In a preferred embodiment of the method of the present invention, the lamp block used in the lamp annealing processing has a plurality of zone segments capable of being controlled for the output power thereof independently of each other, thereby reducing the in-plane variation of the transistor characteristic on the wafer surface.
REFERENCES:
patent: 5155336 (1992-10-01), Gronet et al.
patent: 5305417 (1994-04-01), Najm et al
patent: 5449883 (1995-09-01), Tsuruta
patent: 5635409 (1997-06-01), Moslehi
patent: 5900177 (1999-05-01), Lecouras et al.
patent: 6064799 (2000-05-01), Anderson et al.
patent: 6207936 (2001-03-01), de Waard et al.
patent: 6210484 (2001-04-01), Hathaway
Paschall Mark
Young & Thompson
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