Laminated gate mask ROM device

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257412, H01L 2976

Patent

active

060876999

ABSTRACT:
A substrate is covered with a gate oxide layer between FOX regions with a blanket lower lamina for a gate on the surface. A Mask code mask has a window overlying the desired gate location. A doped code implant region is formed in the substrate by ion implanting code implant dopant through the mask. Following mask removal a blanket upper lamina of the gate covers the lower lamina. A gate mask covers the upper and lower laminae. The gate mask is patterned to protect the gate region over the device, leaving the remainder of the upper and lower lamina exposed. Exposed surfaces of the laminae are etched away leaving a laminated gate. Lightly doped regions are formed in the substrate between the FOX regions and the gate by ion implanting dopant through portions of the gate oxide layer unprotected by the gate; forming spacers next to the gate; and forming source and drain regions in the substrate between the FOX regions and the spacers adjacent to the gate.

REFERENCES:
patent: 5002896 (1991-03-01), Naruke
patent: 5192992 (1993-03-01), Kim et al.
patent: 5200355 (1993-04-01), Choi et al.
patent: 5214305 (1993-05-01), Huang et al.
patent: 5479036 (1995-12-01), Hong
patent: 5480822 (1996-01-01), Hsue et al.
patent: 5576235 (1996-11-01), Hong et al.
patent: 5801416 (1998-09-01), Choi et al.

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