Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Configuration or pattern of bonds
Patent
1996-10-18
2000-03-07
Picard, Leo P.
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Configuration or pattern of bonds
257686, 257694, 257695, H05K 336, H01L 2904
Patent
active
060344385
ABSTRACT:
Integrated circuit chips and method of routing the interface pads from the face of the chip or die to one or more sidewall surfaces of the die. The interconnection is routed from the face of the die to one or more edges of the die, then routed over the edge of the die and onto the side surface. A new pad is then formed on the sidewall surface, which allows multiple die or chips to be stacked in a three-dimensional array, while enabling follow-on signal routing from the sidewall pads. The routing of the interconnects and formation of the sidewall pads can be carried out in an L-connect or L-shaped routing configuration, using a metalization process such as laser pantography.
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Carnahan L. E.
Duong Hung Van
Picard Leo P.
The Regents of the University of California
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